In article <20051203142502.5319663B883@narn.netbsd.org>
daduke@daduke.org wrote:

>  total memory = 256 MB - btw, the machine has 320 MB, more than 256 not
>  supported?

NetBSD/mips doesn't support memory more than 256MB (yet?).
Current mips pmap assumes that all physical memory can be accessed
via KSEG0 and KSEG1.

>  mec0 at mace0 offset 0x280000 intr 3 intrmask 0x0: MAC-110 Ethernet, rev
>  1
>  mec0: Ethernet address 08:00:69:0e:7c:31
>  nsphy0 at mec0 phy 9: DP83840 10/100 media interface, rev. 1
>  nsphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 100baseT4, auto

Hmm, is it always attached at phy 9?
According to several posts of dmesg, it should be at mec0 phy 8,
and it shouldn't have 100baseT4.

Could you see how it's attached on OpenBSD/sgi or other OS?
Or could you try the attached patch?

>  > - type/status of your HUB (speed/duplex, switching/dumb etc.)
>  same problem on Surecom EP-816 switch and crossover to my Linux box
>  (rtl8139), both 100base-T

Just for confirmation, but other machine or interface works
on the same cable and hub?
---
Izumi Tsutsui

Index: if_mec.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/mace/if_mec.c,v
retrieving revision 1.6
diff -u -r1.6 if_mec.c
--- if_mec.c	3 Jun 2005 18:55:12 -0000	1.6
+++ if_mec.c	3 Dec 2005 19:55:29 -0000
@@ -546,13 +546,13 @@
 	struct mec_softc *sc = (void *)self;
 	bus_space_tag_t st = sc->sc_st;
 	bus_space_handle_t sh = sc->sc_sh;
-	uint32_t val;
+	uint64_t val;
 	int i;
 
 	if (mec_mii_wait(sc) != 0)
 		return 0;
 
-	bus_space_write_4(st, sh, MEC_PHY_ADDRESS,
+	bus_space_write_8(st, sh, MEC_PHY_ADDRESS,
 	    (phy << MEC_PHY_ADDR_DEVSHIFT) | (reg & MEC_PHY_ADDR_REGISTER));
 	bus_space_write_8(st, sh, MEC_PHY_READ_INITIATE, 1);
 	delay(25);
@@ -560,7 +560,7 @@
 	for (i = 0; i < 20; i++) {
 		delay(30);
 
-		val = bus_space_read_4(st, sh, MEC_PHY_DATA);
+		val = bus_space_read_8(st, sh, MEC_PHY_DATA);
 
 		if ((val & MEC_PHY_DATA_BUSY) == 0)
 			return val & MEC_PHY_DATA_VALUE;
@@ -580,12 +580,12 @@
 		return;
 	}
 
-	bus_space_write_4(st, sh, MEC_PHY_ADDRESS,
+	bus_space_write_8(st, sh, MEC_PHY_ADDRESS,
 	    (phy << MEC_PHY_ADDR_DEVSHIFT) | (reg & MEC_PHY_ADDR_REGISTER));
 
 	delay(60);
 
-	bus_space_write_4(st, sh, MEC_PHY_DATA, val & MEC_PHY_DATA_VALUE);
+	bus_space_write_8(st, sh, MEC_PHY_DATA, val & MEC_PHY_DATA_VALUE);
 
 	delay(60);
 
@@ -602,7 +602,7 @@
 		delay(30);
 
 		s = splhigh();
-		busy = bus_space_read_4(sc->sc_st, sc->sc_sh, MEC_PHY_DATA);
+		busy = bus_space_read_8(sc->sc_st, sc->sc_sh, MEC_PHY_DATA);
 		splx(s);
 
 		if ((busy & MEC_PHY_DATA_BUSY) == 0)
Index: if_mecreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/mace/if_mecreg.h,v
retrieving revision 1.2
diff -u -r1.2 if_mecreg.h
--- if_mecreg.h	11 Jul 2004 03:13:04 -0000	1.2
+++ if_mecreg.h	3 Dec 2005 19:55:29 -0000
@@ -116,13 +116,11 @@
 #define MEC_TX_VECTOR			0x58
 #define MEC_IRQ_VECTOR			0x58
 
-#define MEC_PHY_DATA_PAD		0x60 /* XXX ? */
-#define MEC_PHY_DATA			0x64
+#define MEC_PHY_DATA			0x60
 #define  MEC_PHY_DATA_BUSY		0x00010000
 #define  MEC_PHY_DATA_VALUE		0x0000ffff
 
-#define MEC_PHY_ADDRESS_PAD		0x68 /* XXX ? */
-#define MEC_PHY_ADDRESS			0x6c
+#define MEC_PHY_ADDRESS			0x68
 #define  MEC_PHY_ADDR_REGISTER		0x0000001f
 #define  MEC_PHY_ADDR_DEVICE		0x000003e0
 #define  MEC_PHY_ADDR_DEVSHIFT		5