Subject: port-macppc/14357: not written CR with printing of CPU
To: None <gnats-bugs@gnats.netbsd.org>
From: None <hamajima@nagoya.ydc.co.jp>
List: netbsd-bugs
Date: 10/26/2001 11:49:57
>Number: 14357
>Category: port-macppc
>Synopsis: print "cpu0 at mainbus0bandit0 at mainbus0"
>Confidential: no
>Severity: non-critical
>Priority: low
>Responsible: port-macppc-maintainer
>State: open
>Class: sw-bug
>Submitter-Id: net
>Arrival-Date: Thu Oct 25 19:51:00 PDT 2001
>Closed-Date:
>Last-Modified:
>Originator: Katsuomi Hamajima
>Release: NetBSD 1.5.2
>Organization:
>Environment:
PowerMac 7300/180
System: NetBSD 1.5.2 (PPCMAC) #1: Thu Oct 25 00:27:28 JST 2001
>Description:
CPU: 604ev (Revision 204)
total memory = 144 MB
avail memory = 126 MB
using 1868 buffers containing 7472 KB of memory
mainbus0 (root)
cpu0 at mainbus0bandit0 at mainbus0
^^ not print CR
>How-To-Repeat:
always in this machine
>Fix:
--- macppc/cpu.c.orig Mon Nov 6 06:44:38 2000
+++ macppc/cpu.c Fri Oct 26 11:34:58 2001
@@ -108,6 +108,8 @@
config_l2cr();
else if (OF_finddevice("/bandit/ohare") != -1)
ohare_init();
+
+ printf("\n");
}
#define CACHE_REG 0xf8000000
@@ -127,7 +129,7 @@
x |= 0x04000020;
cache_reg[4] = x;
- printf(": ohare L2 cache enabled\n");
+ printf(": ohare L2 cache enabled");
}
}
@@ -237,6 +239,4 @@
printf(" backside cache");
} else
printf(": L2 cache not enabled");
-
- printf("\n");
}
>Release-Note:
>Audit-Trail:
>Unformatted: