>Number:         10805
>Category:       kern
>Synopsis:       Mitsumi CR-4804TE ATAPI CDRW not detected by 1.4.2 kernel
>Confidential:   no
>Severity:       critical
>Priority:       medium
>Responsible:    kern-bug-people
>State:          open
>Class:          support
>Submitter-Id:   net
>Arrival-Date:   Thu Aug 10 10:29:01 PDT 2000
>Closed-Date:
>Last-Modified:
>Originator:     Kazuhiko Fukuhara
>Release:        NetBSD 1.4.2
>Organization:
>Environment:
System: NetBSD hannibal 1.4.2 NetBSD 1.4.2 (Bikini) #1: Mon May 29 16:17:26 JST
2000 root@hannibal:/usr/src/sys/arch/i386/compile/Bikini i386

>Description:
Mitsumi CR-4804TE ATAPI CDRW fails detect at boot time.

>How-To-Repeat:
Boot time.

>Fix:
A temporary patch.
Case CR-4804TE drive that connect to secondly IDE interface.
CR-4804TE is unable RST bit reset by WD register.

--- usr/src.orig/sys/dev/ic/wdc.c	Wed Feb  2 08:30:28 2000
+++ usr/src/sys/dev/ic/wdc.c	Mon Apr 17 14:37:37 2000
@@ -207,6 +207,9 @@
 	}
 
 	/* assert SRST, wait for reset to complete */
+/*CR-4804TE patch*/
+if (chp->channel != 1) {
+/*END CR-4804TE patch*/
 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
 	    WDSD_IBM);
 	delay(10);
@@ -221,6 +224,14 @@
 	delay(10);
 
 	ret_value = __wdcwait_reset(chp, ret_value);
+/*CR-4804TE patch*/
+} else {
+  for (drive = 0; drive < 2; drive++) {
+    wdccommandshort(chp, drive, ATAPI_SOFT_RESET);
+    wait_for_unbusy(chp, WDC_RESET_WAIT);
+  }
+} 
+/*END CR-4804TE patch*/
 	WDCDEBUG_PRINT(("%s:%d: after reset, ret_value=0x%d\n",
 	    chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe", chp->channel,
 	    ret_value), DEBUG_PROBE);
@@ -571,6 +582,9 @@
 {
 	int drv_mask1, drv_mask2;
 
+/*CR-4804TE patch*/
+if (chp->channel != 1) {
+/*END CR-4804TE patch*/
 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
 	    WDSD_IBM); /* master */
 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
@@ -582,6 +596,14 @@
 	(void) bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_error);
 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
 	    WDCTL_4BIT);
+/*CR-4804TE patch*/
+} else {
+  int drive;
+  for (drive = 0; drive < 2; drive++) {
+    wdccommandshort(chp, drive, ATAPI_SOFT_RESET);
+    wait_for_unbusy(chp, WDC_RESET_WAIT);
+  }   
+}
 
 	drv_mask1 = (chp->ch_drive[0].drive_flags & DRIVE) ? 0x01:0x00;
 	drv_mask1 |= (chp->ch_drive[1].drive_flags & DRIVE) ? 0x02:0x00;

--- usr/src.orig/sys/dev/ata/ata_wdc.c	Sun Jan 23 21:26:01 2000
+++ usr/src/sys/dev/ata/ata_wdc.c	Sun Jul 16 18:41:02 2000
@@ -431,6 +431,8 @@
 		dma_flags |= (ata_bio->flags & ATA_POLL) ?  WDC_DMA_POLL : 0;
 	}
 
+/*problem ATAPI CD-RW*/
+#if 0
 	/*
 	 * if we missed an interrupt in a PIO transfer, reset and restart.
 	 * Don't try to continue transfer, we may have missed cycles.
@@ -440,6 +442,7 @@
 		wdc_ata_bio_done(chp, xfer);
 		return 1;
 	}
+#endif
 
 	/* Ack interrupt done by wait_for_unbusy */
 	if (wait_for_unbusy(chp,
>Release-Note:
>Audit-Trail:
>Unformatted: