Subject: port-pc532/2569: gdb fails to disassemble all 532 opcodes on NetBSD/pc532
To: None <gnats-bugs@NetBSD.ORG>
From: None <leo@marco.de>
List: netbsd-bugs
Date: 06/25/1996 13:37:00
>Number:         2569
>Category:       port-pc532
>Synopsis:       gdb fails to disassemble all 532 opcodes on NetBSD/pc532
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    gnats-admin (GNATS administrator)
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Tue Jun 25 07:50:05 1996
>Last-Modified:
>Originator:     Matthias Pfaller
>Organization:
leo@dachau.marco.de			in real life: Matthias Pfaller
marco GmbH, 85221 Dachau, Germany	tel: +49 8131 516142
>Release:        1.2_ALPHA
>Environment:
	
System: NetBSD tabatha 1.2_ALPHA NetBSD 1.2_ALPHA (TABATHA) #0: Tue Jun 18 18:50:04 MET DST 1996 leo@tabatha:/usr/src/sys/arch/i386/compile/TABATHA i386


>Description:
	gdb on NetBSD/pc532 can't disassemble all ns32532 opcodes.
	Besides this it doesn't use the xxx_filtered functions when
	printing instructions. Due to this the output is mangled as
	soon as instructions containing symbolic references are
	disassembled.
>How-To-Repeat:
>Fix:
	I applied David Taylor's Fix (mailed to pc532@daver.bungi.com on
	February 16th 1990, Message-ID 9002162329.AA11363@odin.think.com)
	to our version of gdb. I had to do it by hand, but every thing
	works fine now. I changed ns32k-pinsn.c to use the xxx_filtered
	functions.

Matthias

--- Makefile.inc.ORIG	Sat Oct 14 01:23:39 1995
+++ Makefile.inc	Sun Jun 23 00:26:39 1996
@@ -1,4 +1,5 @@
 # $Id: Makefile.inc,v 1.3 1995/09/26 20:23:36 phil Exp $
 
+CFLAGS+= -DNS32532 -DNS32381
 SRCS+=	ns32k-pinsn.c ns32k-tdep.c ns32k-nat.c
 
--- ns32k-opcode.h.ORIG	Sat Oct 14 01:23:39 1995
+++ ns32k-opcode.h	Sun Jun 23 00:16:09 1996
@@ -44,12 +44,23 @@
  * W : word
  * D : double-word
  * Q : quad-word
+ * A : address
  * d : displacement
+ * b : 3rd operand of cmpm or movm instruction
  * q : quick
  * i : immediate (8 bits)
  * r : register number (3 bits)
  * p : displacement - pc relative addressing
-*/
+ * O : setcfg instruction options list
+ * C : cinv instruction options list
+ * S : string instruction options list
+ * U : save/enter register list
+ * u : restore/exit register list
+ * M : mmu register
+ * P : cpu register
+ * g : 3rd operand of inss or exts instruction
+ * G : 4th operand of inss or exts instruction
+ */
 static struct not
 notstrs[] =
 {
@@ -75,7 +86,7 @@
   { "addqb",	 7,16,	0x0c,	"2B1q" },
   { "addqw",	 7,16,	0x0d,	"2W1q" },
   { "addqd",	 7,16,	0x0f,	"2D1q" },
-  { "addr",	 6,16,	0x27,	"1D2D" },
+  { "addr",	 6,16,	0x27,	"1A2D" },
   { "adjspb",	11,16,	0x057c,	"1B" },
   { "adjspw",	11,16,	0x057d,	"1W" },
   { "adjspd",	11,16,	0x057f,	"1D" },
@@ -112,30 +123,31 @@
   { "caseb",	11,16,	0x77c,	"1B" },
   { "casew",	11,16,	0x77d,	"1W" },
   { "cased",	11,16,	0x77f,	"1D" },
-  { "cbitb",	14,24,	0x084e,	"1B2D" },
-  { "cbitw",	14,24,	0x094e,	"1W2D" },
-  { "cbitd",	14,24,	0x0b4e,	"1D2D" },
-  { "cbitib",	14,24,	0x0c4e,	"1B2D" },
-  { "cbitiw",	14,24,	0x0d4e,	"1W2D" },
-  { "cbitid",	14,24,	0x0f4e,	"1D2D" },
+  { "cbitb",	14,24,	0x084e, "1B2A" },
+  { "cbitw",	14,24,	0x094e, "1W2A" },
+  { "cbitd",	14,24,	0x0b4e, "1D2A" },
+  { "cbitib",	14,24,	0x0c4e, "1B2A" },
+  { "cbitiw",	14,24,	0x0d4e, "1W2A" },
+  { "cbitid",	14,24,	0x0f4e, "1D2A" },
   { "checkb",	11,24,	0x0ee,	"2A3B1r" },
-  { "checkw",	11,24,	0x1ee,	"2A3B1r" },
+  { "checkw",	11,24,	0x1ee,	"2A3W1r" },
   { "checkd",	11,24,	0x3ee,	"2A3D1r" },
+  { "cinv",	15,24,	0x271e, "2D1C" },
   { "cmpf",	14,24,	0x09be,	"1F2F" },
   { "cmpl",	14,24,	0x08be,	"1L2L" },
   { "cmpb",	 6,16,	0x04,	"1B2B" },
   { "cmpw",	 6,16,	0x05,	"1W2W" },
   { "cmpd",	 6,16,	0x07,	"1D2D" },
-  { "cmpmb",	14,24,	0x04ce,	"1D2D3d" },
-  { "cmpmw",	14,24,	0x05ce,	"1D2D3d" },
-  { "cmpmd",	14,24,	0x07ce,	"1D2D3d" },
+  { "cmpmb",	14,24,	0x04ce, "1A2A3b" },
+  { "cmpmw",	14,24,	0x05ce, "1A2A3b" },
+  { "cmpmd",	14,24,	0x07ce, "1A2A3b" },
   { "cmpqb",	 7,16,	0x1c,	"2B1q" },
   { "cmpqw",	 7,16,	0x1d,	"2W1q" },
   { "cmpqd",	 7,16,	0x1f,	"2D1q" },
-  { "cmpsb",	16,16,	0x040e,	"1i" },
-  { "cmpsw",	16,16,	0x050e,	"1i" },
-  { "cmpsd",	16,16,	0x070e,	"1i" },
-  { "cmpst",	16,16,	0x840e,	"1i" },
+  { "cmpsb",	16,16,	0x040e, "1S" },
+  { "cmpsw",	16,16,	0x050e, "1S" },
+  { "cmpsd",	16,16,	0x070e, "1S" },
+  { "cmpst",	16,16,	0x840e, "1S" },
   { "comb",	14,24,	0x344e,	"1B2B" },
   { "comw",	14,24,	0x354e,	"1W2W" },
   { "comd",	14,24,	0x374e,	"1D2D" },
@@ -144,21 +156,21 @@
   { "cxpd",	11,16,	0x07f,	"1D" },
   { "deib",	14,24,	0x2cce,	"1B2W" },
   { "deiw",	14,24,	0x2dce,	"1W2D" },
-  { "deid",	14,24,	0x2fce,	"1D2Q" },
+  { "deid",	14,24,	0x2fce, "1D2Q" },
   { "dia",	 8,8,	0xc2,	"" },
   { "divf",	14,24,	0x21be,	"1F2F" },
   { "divl",	14,24,	0x20be,	"1L2L" },
   { "divb",	14,24,	0x3cce,	"1B2B" },
   { "divw",	14,24,	0x3dce,	"1W2W" },
   { "divd",	14,24,	0x3fce,	"1D2D" },
-  { "enter",	 8,8,	0x82,	"1i2d" },
-  { "exit",	 8,8,	0x92,	"1i" },
-  { "extb",	11,24,	0x02e,	"2D3B1r4d" },
-  { "extw",	11,24,	0x12e,	"2D3W1r4d" },
-  { "extd",	11,24,	0x32e,	"2D3D1r4d" },
-  { "extsb",	14,24,	0x0cce,	"1D2B3i" },
-  { "extsw",	14,24,	0x0dce,	"1D2W3i" },
-  { "extsd",	14,24,	0x0fce,	"1D2D3i" },
+  { "enter",	 8,8,	0x82,	"1U2d" },
+  { "exit",	 8,8,	0x92,	"1u" },
+  { "extb",	11,24,	0x02e,	"2A3B1r4d" },
+  { "extw",	11,24,	0x12e,	"2A3W1r4d" },
+  { "extd",	11,24,	0x32e,	"2A3D1r4d" },
+  { "extsb",	14,24,	0x0cce, "1A2B4G3g" },
+  { "extsw",	14,24,	0x0dce, "1A2W4G3g" },
+  { "extsd",	14,24,	0x0fce, "1A2D4G3g" },
   { "ffsb",	14,24,	0x046e,	"1B2B" },
   { "ffsw",	14,24,	0x056e,	"1W2B" },
   { "ffsd",	14,24,	0x076e,	"1D2B" },
@@ -178,16 +190,16 @@
   { "insb",	11,24,	0x0ae,	"2B3B1r4d" },
   { "insw",	11,24,	0x1ae,	"2W3W1r4d" },
   { "insd",	11,24,	0x3ae,	"2D3D1r4d" },
-  { "inssb",	14,24,	0x08ce,	"1B2D3i" },
-  { "inssw",	14,24,	0x09ce,	"1W2D3i" },
-  { "inssd",	14,24,	0x0bce,	"1D2D3i" },
+  { "inssb",	14,24,	0x08ce, "1B2A4G3g" },
+  { "inssw",	14,24,	0x09ce, "1W2A4G3g" },
+  { "inssd",	14,24,	0x0bce, "1D2A4G3g" },
   { "jsr",	11,16,	0x67f,	"1A" },
   { "jump",	11,16,	0x27f,	"1A" },
   { "lfsr",	19,24,	0x00f3e,"1D" },
-  { "lmr",	15,24,	0x0b1e,	"2D1q" },
-  { "lprb",	 7,16,	0x6c,	"2B1q" },
-  { "lprw",	 7,16,	0x6d,	"2W1q" },
-  { "lprd",	 7,16,	0x6f,	"2D1q" },
+  { "lmr",	15,24,	0x0b1e, "2D1M" },
+  { "lprb",	 7,16,	0x6c,	"2B1P" },
+  { "lprw",	 7,16,	0x6d,	"2W1P" },
+  { "lprd",	 7,16,	0x6f,	"2D1P" },
   { "lshb",	14,24,	0x144e,	"1B2B" },
   { "lshw",	14,24,	0x154e,	"1B2W" },
   { "lshd",	14,24,	0x174e,	"1B2D" },
@@ -210,22 +222,22 @@
   { "movdl",	14,24,	0x033e,	"1D2L" },
   { "movfl",	14,24,	0x1b3e,	"1F2L" },
   { "movlf",	14,24,	0x163e,	"1L2F" },
-  { "movmb",	14,24,	0x00ce,	"1D2D3d" },
-  { "movmw",	14,24,	0x01ce,	"1D2D3d" },
-  { "movmd",	14,24,	0x03ce,	"1D2D3d" },
+  { "movmb",	14,24,	0x00ce, "1A2A3b" },
+  { "movmw",	14,24,	0x01ce, "1A2A3b" },
+  { "movmd",	14,24,	0x03ce, "1A2A3b" },
   { "movqb",	 7,16,	0x5c,	"2B1q" },
   { "movqw",	 7,16,	0x5d,	"2B1q" },
   { "movqd",	 7,16,	0x5f,	"2B1q" },
-  { "movsb",	16,16,	0x000e,	"1i" },
-  { "movsw",	16,16,	0x010e,	"1i" },
-  { "movsd",	16,16,	0x030e,	"1i" },
-  { "movst",	16,16,	0x800e,	"1i" },
-  { "movsub",	14,24,	0x0cae,	"1A1A" },
-  { "movsuw",	14,24,	0x0dae,	"1A1A" },
-  { "movsud",	14,24,	0x0fae,	"1A1A" },
-  { "movusb",	14,24,	0x1cae,	"1A1A" },
-  { "movusw",	14,24,	0x1dae,	"1A1A" },
-  { "movusd",	14,24,	0x1fae,	"1A1A" },
+  { "movsb",	16,16,	0x000e, "1S" },
+  { "movsw",	16,16,	0x010e, "1S" },
+  { "movsd",	16,16,	0x030e, "1S" },
+  { "movst",	16,16,	0x800e, "1S" },
+  { "movsub", 14,24,	0x0cae, "1A2A" },
+  { "movsuw", 14,24,	0x0dae, "1A2A" },
+  { "movsud", 14,24,	0x0fae, "1A2A" },
+  { "movusb", 14,24,	0x1cae, "1A2A" },
+  { "movusw", 14,24,	0x1dae, "1A2A" },
+  { "movusd", 14,24,	0x1fae, "1A2A" },
   { "movxbd",	14,24,	0x1cce,	"1B2D" },
   { "movxwd",	14,24,	0x1dce,	"1W2D" },
   { "movxbw",	14,24,	0x10ce,	"1B2W" },
@@ -246,8 +258,8 @@
   { "notb",	14,24,	0x244e, "1B2B" },
   { "notw",	14,24,	0x254e, "1W2W" },
   { "notd",	14,24,	0x274e, "1D2D" },
-  { "orb",	 6,16,	0x18,	"1B1B" },
-  { "orw",	 6,16,	0x19,	"1W1W" },
+  { "orb",	 6,16,	0x18,	"1B2B" },
+  { "orw",	 6,16,	0x19,	"1W2W" },
   { "ord",	 6,16,	0x1b,	"1D2D" },
   { "quob",	14,24,	0x30ce,	"1B2B" },
   { "quow",	14,24,	0x31ce,	"1W2W" },
@@ -256,10 +268,10 @@
   { "remb",	14,24,	0x34ce,	"1B2B" },
   { "remw",	14,24,	0x35ce,	"1W2W" },
   { "remd",	14,24,	0x37ce,	"1D2D" },
-  { "restore",	 8,8,	0x72,	"1i" },
+  { "restore",	 8,8,	0x72,	"1u" },
   { "ret",	 8,8,	0x12,	"1d" },
   { "reti",	 8,8,	0x52,	"" },
-  { "rett",	 8,8,	0x42,	"" },
+  { "rett",	 8,8,	0x42,	"1d" },
   { "rotb",	14,24,	0x004e,	"1B2B" },
   { "rotw",	14,24,	0x014e,	"1B2W" },
   { "rotd",	14,24,	0x034e,	"1B2D" },
@@ -318,23 +330,23 @@
   { "sufb",	11,16,	0x7bc,	"1B" },
   { "sufw",	11,16,	0x7bd,	"1W" },
   { "sufd",	11,16,	0x7bf,	"1D" },
-  { "save",	 8,8,	0x62,	"1i" },
+  { "save",	 8,8,	0x62,	"1U" },
   { "sbitb",	14,24,	0x184e,	"1B2A" },
   { "sbitw",	14,24,	0x194e,	"1W2A" },
   { "sbitd",	14,24,	0x1b4e,	"1D2A" },
   { "sbitib",	14,24,	0x1c4e,	"1B2A" },
   { "sbitiw",	14,24,	0x1d4e,	"1W2A" },
   { "sbitid",	14,24,	0x1f4e,	"1D2A" },
-  { "setcfg",	15,24,	0x0b0e,	"5D1q" },
-  { "sfsr",	14,24,	0x373e,	"5D1D" },
-  { "skpsb",	16,16,	0x0c0e,	"1i" },
-  { "skpsw",	16,16,	0x0d0e,	"1i" },
-  { "skpsd",	16,16,	0x0f0e, "1i" },
-  { "skpst",	16,16,	0x8c0e,	"1i" },
-  { "smr",	15,24,	0x0f1e,	"2D1q" },
-  { "sprb",	 7,16,	0x2c,	"2B1q" },
-  { "sprw",	 7,16,	0x2d,	"2W1q" },
-  { "sprd",	 7,16,	0x2f,	"2D1q" },
+  { "setcfg",	15,24,	0x0b0e, "5D1O" },
+  { "sfsr",	14,24,	0x373e, "5D1D" },
+  { "skpsb",	16,16,	0x0c0e, "1S" },
+  { "skpsw",	16,16,	0x0d0e, "1S" },
+  { "skpsd",	16,16,	0x0f0e, "1S" },
+  { "skpst",	16,16,	0x8c0e, "1S" },
+  { "smr",	15,24,	0x0f1e, "2D1M" },
+  { "sprb",	 7,16,	0x2c,	"2B1P" },
+  { "sprw",	 7,16,	0x2d,	"2W1P" },
+  { "sprd",	 7,16,	0x2f,	"2D1P" },
   { "subf",	14,24,	0x11be,	"1F2F" },
   { "subl",	14,24,	0x10be,	"1L2L" },
   { "subb",	 6,16,	0x20,	"1B2B" },
@@ -365,6 +377,17 @@
   { "xorb",	 6,16,	0x38,	"1B2B" },
   { "xorw",	 6,16,	0x39,	"1W2W" },
   { "xord",	 6,16,	0x3b,	"1D2D" },
+
+#if defined(NS32381)
+  { "dotf",	14,24,	0x0dfe, "1F2F" },
+  { "dotl",	14,24,	0x0cfe, "1L2L" },
+  { "logbf",	14,24,	0x15fe, "1F2F" },
+  { "logbl",	14,24,	0x14fe, "1L2L" },
+  { "polyf",	14,24,	0x09fe, "1F2F" },
+  { "polyl",	14,24,	0x08fe, "1L2L" },
+  { "scalbf", 14,24,	0x11fe, "1F2F" },
+  { "scalbl", 14,24,	0x10fe, "1L2L" },
+#endif
 };				/* notstrs */
 
 /* end: ns32k.opcode.h */
--- ns32k-pinsn.c.ORIG	Sat Oct 14 01:23:39 1995
+++ ns32k-pinsn.c	Sun Jun 23 00:53:59 1996
@@ -30,6 +30,178 @@
 
 #define NEXT_IS_ADDR	'|'
 
+
+struct option {
+  char *pattern;		/* the option itself */
+  unsigned long value;		/* binary value of the option */
+  unsigned long match;		/* these bits must match */
+};
+
+
+struct option opt1[]= /* restore, exit */
+{
+  { "r0",	0x80,	0x80	},
+  { "r1",	0x40,	0x40	},
+  { "r2",	0x20,	0x20	},
+  { "r3",	0x10,	0x10	},
+  { "r4",	0x08,	0x08	},
+  { "r5",	0x04,	0x04	},
+  { "r6",	0x02,	0x02	},
+  { "r7",	0x01,	0x01	},
+  {  0 ,	0x00,	0x00	}
+};
+
+struct option opt2[]= /* save, enter */
+{
+  { "r0",	0x01,	0x01	},
+  { "r1",	0x02,	0x02	},
+  { "r2",	0x04,	0x04	},
+  { "r3",	0x08,	0x08	},
+  { "r4",	0x10,	0x10	},
+  { "r5",	0x20,	0x20	},
+  { "r6",	0x40,	0x40	},
+  { "r7",	0x80,	0x80	},
+  {  0 ,	0x00,	0x00	}
+};
+
+struct option opt3[]= /* setcfg */
+{
+  { "c",	0x8,	0x8	},
+  { "m",	0x4,	0x4	},
+  { "f",	0x2,	0x2	},
+  { "i",	0x1,	0x1	},
+  {  0 ,	0x0,	0x0	}
+};
+
+struct option opt4[]= /* cinv */
+{
+  { "a",	0x4,	0x4	},
+  { "i",	0x2,	0x2	},
+  { "d",	0x1,	0x1	},
+  {  0 ,	0x0,	0x0	}
+};
+
+struct option opt5[]= /* string inst */
+{
+  { "b",	0x1,	0x1	},
+  { "u",	0x6,	0x6	},
+  { "w",	0x2,	0x2	},
+  {  0 ,	0x0,	0x0	}
+};
+
+#if !defined(NS32032) && !defined(NS32532)
+#define NS32032
+#endif
+
+#if defined(NS32532)
+struct option cpureg[]= /* lpr spr */
+{
+  { "us",	0x0,	0xf	},
+  { "dcr",	0x1,	0xf	},
+  { "bpc",	0x2,	0xf	},
+  { "dsr",	0x3,	0xf	},
+  { "car",	0x4,	0xf	},
+  { "fp",	0x8,	0xf	},
+  { "sp",	0x9,	0xf	},
+  { "sb",	0xa,	0xf	},
+  { "usp",	0xb,	0xf	},
+  { "cfg",	0xc,	0xf	},
+  { "psr",	0xd,	0xf	},
+  { "intbase",	0xe,	0xf	},
+  { "mod",	0xf,	0xf	},
+  {  0 ,	0x00,	0xf	}
+};
+#endif
+
+#if defined(NS32532) || defined(NS32382)
+struct option mmureg[]= /* lmr smr */
+{
+  { "mcr",	0x9,	0xf	},
+  { "msr",	0xa,	0xf	},
+  { "tear",	0xb,	0xf	},
+  { "ptb0",	0xc,	0xf	},
+  { "ptb1",	0xd,	0xf	},
+  { "ivar0",	0xe,	0xf	},
+  { "ivar1",	0xf,	0xf	},
+  {  0 ,	0x0,	0xf	}
+};
+#endif
+
+#if defined(NS32032)
+struct option cpureg[]= /* lpr spr */
+{
+  { "upsr",	0x0,	0xf	},
+  { "fp",	0x8,	0xf	},
+  { "sp",	0x9,	0xf	},
+  { "sb",	0xa,	0xf	},
+  { "psr",	0xb,	0xf	},
+  { "intbase",	0xe,	0xf	},
+  { "mod",	0xf,	0xf	},
+  {  0 ,	0x0,	0xf	}
+};
+#endif
+
+#if !defined(NS32532) && !defined(NS32382) /* should be defined(NS32082)... */
+struct option mmureg[]= /* lmr smr */
+{
+  { "bpr0",	0x0,	0xf	},
+  { "bpr1",	0x1,	0xf	},
+  { "pf0",	0x4,	0xf	},
+  { "pf1",	0x5,	0xf	},
+  { "sc",	0x8,	0xf	},
+  { "msr",	0xa,	0xf	},
+  { "bcnt",	0xb,	0xf	},
+  { "ptb0",	0xc,	0xf	},
+  { "ptb1",	0xd,	0xf	},
+  { "eia",	0xf,	0xf	},
+  {  0 ,	0x0,	0xf	}
+};
+#endif
+
+/*
+ * figure out which options are present
+ */
+void
+optlist(options, optionP, result)
+    int options;
+    struct option *optionP;
+    char *result;
+{
+    if (options == 0) {
+	sprintf(result, "[]");
+	return;
+    }
+    sprintf(result, "[");
+
+    for (; (options != 0) && optionP->pattern; optionP++) {
+	if ((options & optionP->match) == optionP->value) {
+	    /* we found a match, update result and options */
+	    strcat(result, optionP->pattern);
+	    options &= ~optionP->value;
+	    if (options != 0)	/* more options to come */
+		strcat(result, ",");
+	}
+      }
+      if (options != 0)
+	strcat(result, "undefined");
+
+      strcat(result, "]");
+}
+
+list_search(reg_value, optionP, result)
+    int reg_value;
+    struct option *optionP;
+    char *result;
+{
+    for (; optionP->pattern; optionP++) {
+	if ((reg_value & optionP->match) == optionP->value) {
+	    sprintf(result, "%s", optionP->pattern);
+	    return;
+	}
+    }
+    sprintf(result, "undefined");
+}
+
 /*
  * extract "count" bits starting "offset" bits
  * into buffer
@@ -162,11 +334,11 @@
   /* Handle undefined instructions.  */
   if (i == NOPCODES)
     {
-      fprintf (stream, "0%o", buffer[0]);
+      fprintf_filtered (stream, "0%o", buffer[0]);
       return 1;
     }
 
-  fprintf (stream, "%s", notstrs[i].name);
+  fprintf_filtered (stream, "%s", notstrs[i].name);
 
   ioffset = notstrs[i].detail.ibits;
   aoffset = notstrs[i].detail.ibits;
@@ -183,7 +355,7 @@
       /* 0 for operand A, 1 for operand B, greater for other args.  */
       int whicharg = 0;
       
-      fputc ('\t', stream);
+      fputs_filtered ("\t", stream);
 
       maxarg = 0;
 
@@ -227,7 +399,8 @@
       for (argnum = 0; argnum <= maxarg; argnum++)
 	{
 	  CORE_ADDR addr;
-	  char *ch, *index ();
+	  char *ch, *index (), b[2];
+	  b[1] = 0;
 	  for (ch = arg_bufs[argnum]; *ch;)
 	    {
 	      if (*ch == NEXT_IS_ADDR)
@@ -240,11 +413,13 @@
 		  if (*ch)
 		    ++ch;
 		}
-	      else
-		putc (*ch++, stream);
+	      else {
+		b[0] = *ch++;
+		fputs_filtered (b, stream);
+	      }
 	    }
 	  if (argnum < maxarg)
-	    fprintf (stream, ", ");
+	    fprintf_filtered (stream, ", ");
 	}
     }
   return aoffset / 8;
@@ -274,6 +449,7 @@
   int Ivalue;
   int disp1, disp2;
   int index;
+  int size;
 
   switch (d)
     {
@@ -282,6 +458,7 @@
     case 'B':
     case 'W':
     case 'D':
+    case 'Q':
     case 'A':
       addr_mode = bit_extract (buffer, ioffset-5, 5);
       ioffset -= 5;
@@ -417,6 +594,27 @@
     case 'd':
       sprintf (result, "%d", get_displacement (buffer, aoffsetp));
       break;
+    case 'b':
+	Ivalue = get_displacement (buffer, aoffsetp);
+	/*
+	 * Warning!!  HACK ALERT!
+	 * Operand type 'b' is only used by the cmp{b,w,d} and
+	 * movm{b,w,d} instructions; we need to know whether
+	 * it's a `b' or `w' or `d' instruction; and for both
+	 * cmpm and movm it's stored at the same place so we
+	 * just grab two bits of the opcode and look at it...
+	 *
+	 */
+	size = bit_extract(buffer, ioffset-6, 2);
+	if (size == 0)		/* 00 => b */
+	size = 1;
+	else if (size == 1)	/* 01 => w */
+	size = 2;
+	else
+	size = 4;		/* 11 => d */
+
+	sprintf (result, "%d", (Ivalue / size) + 1);
+	break;
     case 'p':
       sprintf (result, "%c%d%c", NEXT_IS_ADDR,
 	       addr + get_displacement (buffer, aoffsetp),
@@ -426,6 +624,51 @@
       Ivalue = bit_extract (buffer, *aoffsetp, 8);
       *aoffsetp += 8;
       sprintf (result, "0x%x", Ivalue);
+      break;
+    case 'u':
+      Ivalue = bit_extract (buffer, *aoffsetp, 8);
+      optlist(Ivalue, opt1, result);
+      *aoffsetp += 8;
+      break;
+    case 'U':
+      Ivalue = bit_extract(buffer, *aoffsetp, 8);
+      optlist(Ivalue, opt2, result);
+      *aoffsetp += 8;
+      break;
+    case 'O':
+      Ivalue = bit_extract(buffer, ioffset-4, 4);
+      optlist(Ivalue, opt3, result);
+      ioffset -= 4;
+      break;
+    case 'C':
+      Ivalue = bit_extract(buffer, ioffset-4, 4);
+      optlist(Ivalue, opt4, result);
+      ioffset -= 4;
+      break;
+    case 'S':
+      Ivalue = bit_extract(buffer, *aoffsetp, 8);
+      optlist(Ivalue, opt5, result);
+      *aoffsetp += 8;
+      break;
+    case 'M':
+      Ivalue = bit_extract(buffer, ioffset-4, 4);
+      list_search(Ivalue, mmureg, result);
+      ioffset -= 4;
+      break;
+    case 'P':
+      Ivalue = bit_extract(buffer, ioffset-4, 4);
+      list_search(Ivalue, cpureg, result);
+      ioffset -= 4;
+      break;
+    case 'g':
+      Ivalue = bit_extract(buffer, *aoffsetp, 3);
+      sprintf(result, "%d", Ivalue);
+      *aoffsetp += 3;
+      break;
+    case 'G':
+      Ivalue = bit_extract(buffer, *aoffsetp, 5);
+      sprintf(result, "%d", Ivalue + 1);
+      *aoffsetp += 5;
       break;
     }
   return ioffset;
>Audit-Trail:
>Unformatted: