>Number:         2135
>Category:       port-amiga
>Synopsis:       Patches to fix problems with Picasso II in the cirrus 5426 driver
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    gnats-admin (GNATS administrator)
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Mon Feb 26 16:20:02 1996
>Last-Modified:
>Originator:     Ezra Story
>Organization:
== Ezra Story -- ezy@panix.com -- Ezy@IRC -- http://www.best.com/~ezy ==
>Release:        1.1
>Environment:

System: NetBSD inca 1.1A NetBSD 1.1A (INCA) #98: Mon Feb 12 10:04:40 EST 1996 ezy@inca:/usr/src/sys/arch/amiga/compile/INCA amiga


>Description:

The current grf_cl driver has problems with some Picasso II cards.  It
will sometimes display a white or black screen instead of the graphics
display on '040's.  This seems to be due to some kind of problem with the
address mapping to the color registers.

>How-To-Repeat:

Run grf_cl with an '040 or fast '030 and a Picasso II.

>Fix:

This patch adds an offset to the DAC registers when a picasso is in use.  
The solution apparently is to add 0xfff to each register address value.

Here is the patch:

*** old/grf_cl.c	Thu Feb  1 07:06:22 1996
--- new/grf_cl.c	Mon Feb 26 07:21:49 1996
***************
*** 48,53 ****
--- 48,54 ----
   * Lutz Vieweg's retina driver by Kari Mettinen 08/94
   * Contributions by Ill, ScottE, MiL
   * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95
+  * Picasso/040 patches (wee!) by crest 01/96
   *
   * Thanks to Village Tronic Marketing Gmbh for providing me with
   * a Picasso-II board.
***************
*** 924,930 ****
  
  	ba = gfp->g_regkva;
  	/* first read colors out of the chip, then copyout to userspace */
! 	vgaw(ba, VDAC_ADDRESS_W, cmap->index);
  	x = cmap->count - 1;
  
  /* Some sort 'o Magic. Spectrum has some changes on the board to speed
--- 925,931 ----
  
  	ba = gfp->g_regkva;
  	/* first read colors out of the chip, then copyout to userspace */
! 	vgaw(ba, VDAC_ADDRESS_R, cmap->index);
  	x = cmap->count - 1;
  
  /* Some sort 'o Magic. Spectrum has some changes on the board to speed
***************
*** 1310,1316 ****
  	    (clkdiv << 1));
  
  	delay(200000);
! 	vgaw(ba, VDAC_MASK, 0xff);
  	delay(200000);
  	vgar(ba, VDAC_MASK);
  	delay(200000);
--- 1311,1324 ----
  	    (clkdiv << 1));
  
  	delay(200000);
! 
! 	/* write 0x00 to VDAC_MASK before accessing HDR this helps
! 	   sometimes, out of "secret" application note (crest) */
! 	vgaw(ba, VDAC_MASK, 0);
! 	delay(200000);
! 	/* reset HDR "magic" access counter (crest) */
! 	vgar(ba, VDAC_ADDRESS);
! 
  	delay(200000);
  	vgar(ba, VDAC_MASK);
  	delay(200000);
***************
*** 1343,1349 ****
--- 1351,1364 ----
  		HDE = (gv->disp_width / 8) * 3;
  		break;
  	}
+ 	delay(20000);
+ 
+ 	/* reset HDR "magic" access counter (crest) */
+ 	vgar(ba, VDAC_ADDRESS);
  	delay(200000);
+ 	/* then enable all bit in VDAC_MASK afterwards (crest) */
+ 	vgaw(ba, VDAC_MASK, 0xff);
+ 	delay(20000);
  
  	WCrt(ba, CRT_ID_OFFSET, HDE);
  	WCrt(ba, CRT_ID_EXT_DISP_CNTL,
*** old/grf_clreg.h	Thu Feb  1 07:06:22 1996
--- new/grf_clreg.h	Mon Feb 26 07:21:54 1996
***************
*** 257,269 ****
  #define PASS_ADDRESS_WP		0x9000
  
  /* Video DAC */
! #define VDAC_ADDRESS		0x03c8
! #define VDAC_ADDRESS_W		0x03c8
! #define VDAC_ADDRESS_R		0x03c7
! #define VDAC_STATE		0x03c7
! #define VDAC_DATA		0x03c9
! #define VDAC_MASK		0x03c6
! #define HDR			0x03c6	/* Hidden DAC register, 4 reads to access */
  
  
  #define WGfx(ba, idx, val) \
--- 257,269 ----
  #define PASS_ADDRESS_WP		0x9000
  
  /* Video DAC */
! #define VDAC_ADDRESS	0x03c8
! #define VDAC_ADDRESS_W	0x03c8
! #define VDAC_ADDRESS_R	((cltype==PICASSO)?0x03c7+0xfff:0x3c7)
! #define VDAC_STATE	0x03c7
! #define VDAC_DATA	((cltype==PICASSO)?0x03c9+0xfff:0x3c9)
! #define VDAC_MASK       0x03c6
! #define HDR	        0x03c6	/* Hidden DAC register, 4 reads to access */
  
  
  #define WGfx(ba, idx, val) \
***************
*** 277,286 ****
  
  #define WAttr(ba, idx, val) \
  	do {	\
! 		unsigned char tmp;\
! 		vgaw(ba, CRT_ADDRESS, CRT_ID_ACT_TOGGLE_RBACK);\
! 		tmp = vgar(ba, CRT_ADDRESS_R);\
! 		if(tmp & 0x80)vgaw(ba,ACT_ADDRESS_W,vgar(ba,ACT_ADDRESS_R));\
  		vgaw(ba, ACT_ADDRESS_W, idx);\
  		vgaw(ba, ACT_ADDRESS_W, val);\
  	} while (0)
--- 277,283 ----
  
  #define WAttr(ba, idx, val) \
  	do {	\
! 		vgar(ba, ACT_ADDRESS_RESET);\
  		vgaw(ba, ACT_ADDRESS_W, idx);\
  		vgaw(ba, ACT_ADDRESS_W, val);\
  	} while (0)
***************
*** 354,364 ****
  }
  
  static inline unsigned char RAttr(volatile void * ba, short idx) {
! 
! 	unsigned char tmp;
! 	vgaw(ba, CRT_ADDRESS, CRT_ID_ACT_TOGGLE_RBACK);
! 	tmp = vgar(ba, CRT_ADDRESS_R);
! 	if(tmp & 0x80)vgar(ba,ACT_ADDRESS_R);
  	vgaw(ba, ACT_ADDRESS_W, idx);
  	return vgar (ba, ACT_ADDRESS_R);
  }
--- 351,357 ----
  }
  
  static inline unsigned char RAttr(volatile void * ba, short idx) {
! 	vgar(ba, ACT_ADDRESS_RESET);
  	vgaw(ba, ACT_ADDRESS_W, idx);
  	return vgar (ba, ACT_ADDRESS_R);
  }


>Audit-Trail:
>Unformatted: