Subject: port-amiga/1960: port-amiga spends too much time checking _mmutype.
To: None <gnats-bugs@gnats.netbsd.org>
From: Peter Seebach <seebs@taniemarie.solon.com>
List: netbsd-bugs
Date: 01/18/1996 22:00:00
>Number: 1960
>Category: port-amiga
>Synopsis: port-amiga locore.s tests mmutype excessively.
>Confidential: no
>Severity: non-critical
>Priority: low
>Responsible: gnats-admin (GNATS administrator)
>State: open
>Class: change-request
>Submitter-Id: net
>Arrival-Date: Thu Jan 18 23:20:02 1996
>Last-Modified:
>Originator: Peter Seebach
>Organization:
Usenet Fact Police (Undercover)
>Release: Jan 7 1996
>Environment:
System: NetBSD taniemarie 1.1A NetBSD 1.1A (SEEBS) #0: Mon Jan 15 20:07:46 CST 1996 seebs@taniemarie:/usr/src/sys/arch/amiga/compile/SEEBS amiga
>Description:
The port-amiga locore.s tests against _mmutype even if only one
CPU is supported.
>How-To-Repeat:
Look at locore.s
>Fix:
This is a huge diff, and may not be correct. The '040 side appears
to work. It does not yet fix the 020/030 differences.
Something like this would probably be worth it; a rough estimate
is that *everything* is 10-15% faster on an '040 system, with
this patch, because the system spends several instructions (and
at least one branch) fewer per MMU activity.
This may apply usefully to other -68k ports. I'd like to see
suggestions for *anything* cleaner.
*** locore.old Mon Dec 11 14:33:01 1995
--- locore.s Thu Jan 18 21:58:48 1996
***************
*** 46,51 ****
--- 46,58 ----
* Other contributors: Bryan Ford (kernel reload stuff)
*/
+ #if (defined(M68040) && (defined(M68030) || defined(M68020)))
+ #define MULTMMU
+ #endif
+ #if (defined(M68030) || defined(M68020))
+ #define M680_23_0
+ #endif
+
#include "assym.s"
.long 0x4ef80400+NBPG /* jmp jmp0.w */
***************
*** 103,110 ****
--- 110,120 ----
movl usp,a0 | save the user SP
movl a0,sp@(FR_SP) | in the savearea
lea sp@(FR_HW),a1 | grab base of HW berr frame
+ #if MULTMMU
cmpl #MMU_68040,_mmutype
jne Lbe030
+ #endif
+ #ifdef M68040
movl a1@(8),sp@- | V = exception address
clrl sp@- | dummy code
moveq #0,d0
***************
*** 125,130 ****
--- 135,142 ----
btst #10,d0 | test ATC
jeq Lisberr | it's a bus error
jra Lismerr
+ #endif /* M68040 */
+ #ifdef M680_23_0
Lbe030:
moveq #0,d0
movw a1@(10),d0 | grab SSW for fault processing
***************
*** 132,137 ****
--- 144,150 ----
jeq LbeX0 | no, test RC
bset #14,d0 | yes, must set FB
movw d0,a1@(10) | for hardware too
+ #endif /* M680_23_0 */
LbeX0:
btst #13,d0 | RC set?
jeq LbeX1 | no, skip
***************
*** 226,233 ****
--- 239,248 ----
_fpunsupp:
#if defined(M68040)
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype | 68040?
jne _illinst | no, treat as illinst
+ #endif /* MULTMMU */
#ifdef FPSP
.globl fpsp_unsupp
jmp fpsp_unsupp | yes, go handle it
***************
*** 836,845 ****
--- 851,864 ----
pea sp@ | addr of space for D0
jbsr _main | main(firstaddr, r0)
addql #4,sp | pop args
+ #ifdef 68040
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype | 68040?
jne Lnoflush | no, skip
+ #endif
.word 0xf478 | cpusha dc
.word 0xf498 | cinva ic
+ #endif
Lnoflush:
movl sp@(FR_SP),a0 | grab and load
movl a0,usp | user SP
***************
*** 909,922 ****
--- 928,946 ----
movl sp@(4),a0 | source address
movl sp@(8),a1 | destination address
movl #NBPG/32,d0 | number of 32 byte chunks
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jne Lmlloop | no, use movl
+ #endif /* MULTMMU */
+ #ifdef M680_23_0
Lm16loop:
.long 0xf6209000 | move16 a0@+,a1@+
.long 0xf6209000 | move16 a0@+,a1@+
subql #1,d0
jne Lm16loop
rts
+ #endif /* M680_23_0 */
+ #ifdef M68040
Lmlloop:
movl a0@+,a1@+
movl a0@+,a1@+
***************
*** 929,934 ****
--- 953,959 ----
subql #1,d0
jne Lmlloop
rts
+ #endif /* M68040 */
/*
* update profiling information for the user
* addupc(pc, &u.u_prof, ticks)
***************
*** 1247,1274 ****
--- 1272,1315 ----
movl _curpcb,a1 | restore p_addr
Lswnochg:
lea tmpstk,sp | now goto a tmp stack for NMI
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jeq Lres2
+ #endif /* MULTMMU */
+ #ifdef M680_23_0
movl #CACHE_CLR,d0
movc d0,cacr | invalidate cache(s)
pflusha | flush entire TLB
+ #ifdef M68040
jra Lres3
+ #endif /* M68040 */
+ #endif /* M680_23_0 */
+ #ifdef M68040
Lres2:
.word 0xf518 | pflusha (68040)
movl #CACHE40_ON,d0
movc d0,cacr | invalidate cache(s)
+ #endif /* M68040 */
Lres3:
movl a1@(PCB_USTP),d0 | get USTP
moveq #PGSHIFT,d1
lsll d1,d0 | convert to addr
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jeq Lres4
+ #endif /* MULTMMU */
+ #ifdef M680_23_0
lea _protorp,a0 | CRP prototype
movl d0,a0@(4) | stash USTP
pmove a0@,crp | load new user root pointer
+ #ifdef MULTMMU
jra Lres5
+ #endif
+ #endif /* M680_23_0 */
+ #ifdef M68040
Lres4:
.word 0x4e7b,0x0806 | movc d0,URP
+ #endif /* M68040 */
Lres5:
movl a1@(PCB_CMAP2),_CMAP2 | reload tmp map
moveml a1@(PCB_REGS),#0xFCFC | and registers
***************
*** 1398,1405 ****
--- 1439,1449 ----
*/
ENTRY(TBIA)
__TBIA:
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jeq Ltbia040
+ #endif
+ #ifdef M680_23_0
pflusha | flush entire TLB
tstl _mmutype
jpl Lmc68851a | 68851 implies no d-cache
***************
*** 1407,1414 ****
--- 1451,1461 ----
movc d0,cacr | invalidate on-chip d-cache
Lmc68851a:
rts
+ #endif /* M680_23_0 */
+ #ifdef M68040
Ltbia040:
.word 0xf518 | pflusha
+ #endif /* M68040 */
rts
/*
***************
*** 1420,1427 ****
--- 1467,1477 ----
jne __TBIA | yes, flush entire TLB
#endif
movl sp@(4),a0 | get addr to flush
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jeq Ltbis040
+ #endif
+ #ifdef M680_23_0
tstl _mmutype
jpl Lmc68851b | is 68851?
pflush #0,#0,a0@ | flush address from both sides
***************
*** 1431,1436 ****
--- 1481,1488 ----
Lmc68851b:
pflushs #0,#0,a0@ | flush address from both sides
rts
+ #endif /* M680_23_0 */
+ #ifdef M68040
Ltbis040:
moveq #FC_SUPERD,d0 | select supervisor
movc d0,dfc
***************
*** 1439,1444 ****
--- 1491,1497 ----
movc d0,dfc
.word 0xf508 | pflush a0@
rts
+ #endif /* M68040 */
/*
* Invalidate supervisor side of TLB
***************
*** 1448,1455 ****
--- 1501,1511 ----
tstl fulltflush | being conservative?
jne __TBIA | yes, flush everything
#endif
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jeq Ltbias040
+ #endif
+ #ifdef M680_23_0
tstl _mmutype
jpl Lmc68851c | 68851?
pflush #4,#4 | flush supervisor TLB entries
***************
*** 1459,1468 ****
--- 1515,1527 ----
Lmc68851c:
pflushs #4,#4 | flush supervisor TLB entries
rts
+ #endif /* M680_23_0 */
+ #ifdef M68040
Ltbias040:
| 68040 can't specify supervisor/user on pflusha, so we flush all
.word 0xf518 | pflusha
rts
+ #endif /* M68040 */
/*
* Invalidate user side of TLB
***************
*** 1472,1479 ****
--- 1531,1541 ----
tstl fulltflush | being conservative?
jne __TBIA | yes, flush everything
#endif
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jeq Ltbiau040
+ #endif
+ #ifdef M680_23_0
tstl _mmutype
jpl Lmc68851d | 68851?
pflush #0,#4 | flush user TLB entries
***************
*** 1483,1492 ****
--- 1545,1557 ----
Lmc68851d:
pflushs #0,#4 | flush user TLB entries
rts
+ #endif /* M680_23_0 */
+ #ifdef M68040
Ltbiau040:
| 68040 can't specify supervisor/user on pflusha, so we flush all
.word 0xf518 | pflusha
rts
+ #endif /* M68040 */
/*
* Invalidate instruction cache
***************
*** 1517,1552 ****
--- 1582,1633 ----
*/
ENTRY(DCIA)
__DCIA:
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jne Ldciax
+ #endif
+ #ifdef M68040
.word 0xf478 | cpusha dc
+ #endif
Ldciax:
rts
ENTRY(DCIS)
__DCIS:
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jne Ldcisx
+ #endif
+ #ifdef M68040
.word 0xf478 | cpusha dc
nop
+ #endif
Ldcisx:
rts
ENTRY(DCIU)
__DCIU:
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jne Ldciux
+ #endif
+ #ifdef M68040
.word 0xf478 | cpusha dc
+ #endif
Ldciux:
rts
| Invalid single cache line
ENTRY(DCIAS)
__DCIAS:
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jne Ldciasx
+ #endif
+ #ifdef M68040
movl sp@(4),a0
.word 0xf468 | cpushl dc,a0@
+ #endif
Ldciasx:
rts
#ifdef M68040
***************
*** 1580,1595 ****
#endif /* M68040 */
ENTRY(PCIA)
! #if defined(M68030) || defined(M68030)
! #if defined(M68040)
cmpl #MMU_68040,_mmutype
jeq Lpcia040
#endif
movl #DC_CLEAR,d0
movc d0,cacr | invalidate on-chip d-cache
rts
! #endif
! #if defined(M68040)
ENTRY(DCFA)
Lpcia040:
.word 0xf478 | cpusha dc
--- 1661,1676 ----
#endif /* M68040 */
ENTRY(PCIA)
! #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jeq Lpcia040
#endif
+ #ifdef M680_23_0
movl #DC_CLEAR,d0
movc d0,cacr | invalidate on-chip d-cache
rts
! #endif /* M680_23_0 */
! #ifdef M68040
ENTRY(DCFA)
Lpcia040:
.word 0xf478 | cpusha dc
***************
*** 1645,1661 ****
--- 1726,1748 ----
movl sp@(4),d0 | new USTP
moveq #PGSHIFT,d1
lsll d1,d0 | convert to addr
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jeq Lldustp040
+ #endif
+ #ifdef M680_23_0
lea _protorp,a0 | CRP prototype
movl d0,a0@(4) | stash USTP
pmove a0@,crp | load root pointer
movl #DC_CLEAR,d0
movc d0,cacr | invalidate on-chip d-cache
rts | since pmove flushes TLB
+ #endif /* M680_23_0 */
+ #ifdef M68040
Lldustp040:
.word 0x4e7b,0x0806 | movec d0,URP
rts
+ #endif
/*
* Flush any hardware context associated with given USTP.
***************
*** 1663,1670 ****
--- 1750,1760 ----
* and ATC entries in PMMU.
*/
ENTRY(flushustp)
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jeq Lnot68851
+ #endif
+ #ifdef M680_23_0
tstl _mmutype | 68851 PMMU?
jle Lnot68851 | no, nothing to do
movl sp@(4),d0 | get USTP to flush
***************
*** 1672,1685 ****
--- 1762,1780 ----
lsll d1,d0 | convert to address
movl d0,_protorp+4 | stash USTP
pflushr _protorp | flush RPT/TLB entries
+ #endif
Lnot68851:
rts
ENTRY(ploadw)
movl sp@(4),a0 | address to load
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jeq Lploadw040
+ #endif
+ #ifdef M680_23_0
ploadw #1,a0@ | pre-load translation
+ #endif
Lploadw040: | should 68040 do a ptest?
rts
***************
*** 1741,1751 ****
--- 1836,1850 ----
.globl _doboot
_doboot:
movl #CACHE_OFF,d0
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype | is it 68040
jne Ldoboot0
+ #endif
+ #ifdef M68040
.word 0xf4f8 | cpusha bc - push and invalidate caches
nop
movl #CACHE40_OFF,d0
+ #endif
Ldoboot0:
movc d0,cacr | disable on-chip cache(s)
***************
*** 1778,1796 ****
--- 1877,1903 ----
| ok, turn off MMU..
Ldoreboot:
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype | is it 68040
jeq Lmmuoff040
+ #endif
+ #ifdef M680_23_0
lea zero,a0
pmove a0@,tc | Turn off MMU
lea nullrp,a0
pmove a0@,crp | Turn off MMU some more
pmove a0@,srp | Really, really, turn off MMU
+ #ifdef MULTMMU
jra Ldoboot1
+ #endif
+ #endif /* M680_23_0 */
+ #ifdef M68040
Lmmuoff040:
movl #0,d0
.word 0x4e7b,0x0003 | movc d0,TC
.word 0x4e7b,0x0806 | movc d0,URP
.word 0x4e7b,0x0807 | movc d0,SRP
+ #endif /* M68040 */
Ldoboot1:
| this weird code is the OFFICIAL way to reboot an Amiga ! ..
***************
*** 1823,1833 ****
--- 1930,1944 ----
movew #(1<<9),a5@(0x096) | disable DMA (before clobbering chipmem)
movl #CACHE_OFF,d0
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jne Lreload1
+ #endif
+ #ifdef M68040
.word 0xf4f8 | cpusha bc - push and invalidate caches
nop
movl #CACHE40_OFF,d0
+ #endif
Lreload1:
movc d0,cacr | disable on-chip cache(s)
***************
*** 1854,1872 ****
--- 1965,1991 ----
jcc Lreload_copy
| ok, turn off MMU..
+ #ifdef MULTMMU
cmpl #MMU_68040,_mmutype
jeq Lreload040
+ #endif MULTMMU
+ #ifdef M680_23_0
lea zero,a3
pmove a3@,tc | Turn off MMU
lea nullrp,a3
pmove a3@,crp | Turn off MMU some more
pmove a3@,srp | Really, really, turn off MMU
+ #ifdef M68040
jra Lreload2
+ #endif /* M68040 */
+ #endif /* M680_23_0 */
+ #ifdef M68040
Lreload040:
movl #0,d2
.word 0x4e7b,0x2003 | movc d2,TC
.word 0x4e7b,0x2806 | movc d2,URP
.word 0x4e7b,0x2807 | movc d2,SRP
+ #endif /* M68040 */
Lreload2:
moveq #0,d2 | clear unused registers
>Audit-Trail:
>Unformatted: