>Number:         1865
>Category:       kern
>Synopsis:       Patches to use Hayes ESP with com.c
>Confidential:   no
>Severity:       non-critical
>Priority:       low
>Responsible:    kern-bug-people (Kernel Bug People)
>State:          open
>Class:          change-request
>Submitter-Id:   net
>Arrival-Date:   Thu Dec 28 15:05:02 1995
>Last-Modified:
>Originator:     John M Vinopal
>Organization:
The Wailer at the Gates of Dawn              | banshee@resort.com          |
Just who ARE you calling a FROOFROO Head?    |                             |
DoD#0667  "Just a friend of the beast."      | http://www.resort.com       |
2,3,5,7,13,17,19,31,61,89,107,127,521,607....|                             |
>Release:        1.1
>Environment:
System: NetBSD gabriella.resort.com 1.1 NetBSD 1.1 (GABRIELLA-NCR) #1: Wed Dec 6 23:25:59 PST 1995 banshee@gabriella.resort.com:/usr/local/NetBSD/src/sys/arch/i386/compile/GABRIELLA-NCR i386

>Description:
	The enclosed shar file contains dev/ic/espreg.h and a patch to modify
	com.c (diffs from 1.63) to support the hayes ESP card in its enhanced
	16550 mode.  This allows the use of the board's 1024k fifos.

	This code is a minor reorganization from previous code by M. VanLoon,
	S.E. Fagin, and myself.  

	ESP support is enabled by using "options COM_ESP" in the config file.
	No extra object code is included if this option is not set.  Unlike
	previous code, likely board locations are probed to locate the board.  

	This PR makes obsolete PR#1596/port-i386, which should be closed.
>How-To-Repeat:
	N/A
>Fix:

# This is a shell archive.  Save it in a file, remove anything before
# this line, and then unpack it by entering "sh file".  Note, it may
# create directories; files and directories will be owned by you and
# have default permissions.
#
# This archive contains:
#
#	COMESP-PATCH
#	espreg.h
#
echo x - COMESP-PATCH
sed 's/^X//' >COMESP-PATCH << 'END-of-COMESP-PATCH'
X*** com.c-163	Wed Dec 27 14:33:59 1995
X***************
X*** 61,66 ****
X--- 61,69 ----
X  #include <dev/isa/isavar.h>
X  #include <dev/isa/comreg.h>
X  #include <dev/ic/ns16550reg.h>
X+ #ifdef COM_ESP
X+ #include <dev/ic/espreg.h>
X+ #endif
X  #define	com_lcr	com_cfcr
X  
X  #define	COM_IBUFSIZE	(2 * 256)
X***************
X*** 76,84 ****
X--- 79,91 ----
X  	int sc_errors;
X  
X  	int sc_iobase;
X+ #ifdef COM_ESP
X+ 	int sc_espbase;
X+ #endif
X  	u_char sc_hwflags;
X  #define	COM_HW_NOIEN	0x01
X  #define	COM_HW_FIFO	0x02
X+ #define	COM_HW_ESP	0x04
X  #define	COM_HW_CONSOLE	0x40
X  	u_char sc_swflags;
X  #define	COM_SW_SOFTCAR	0x01
X***************
X*** 186,191 ****
X--- 193,244 ----
X  	return 1;
X  }
X  
X+ #ifdef COM_ESP
X+ int
X+ comprobeESP(esp_port, sc)
X+ 	int esp_port;
X+ 	struct com_softc *sc;
X+ {
X+ 	char	val, dips;
X+ 	int	com_base_list[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
X+ 
X+ 	/* Test for ESP signature at the ESP i/o port. */
X+ 	if ((inb(esp_port) & 0xf3) == 0)
X+ 		return(0);
X+ 
X+ 	/* Check compatibility mode settings */
X+ 	outb(esp_port + ESP_CMD1, ESP_GETDIPS);
X+ 	dips = inb(esp_port + ESP_STATUS1);
X+ 
X+ 	/* Does this ESP board service this com port?: Bits 0,1 == COM0..3 */
X+ 	if (sc->sc_iobase != com_base_list[(dips & 0x03)]) {
X+ 		return(0);
X+ 	}
X+ 	printf(": ESP");
X+ 
X+ 	/* Check ESP Self Test bits. */
X+ 	/* Check for ESP version 2.0: bits 4,5,6 == 010 */
X+ 	outb(esp_port + ESP_CMD1, ESP_GETTEST);
X+ 	val = inb(esp_port + ESP_STATUS1);	/* Always 0x00 */
X+ 	val = inb(esp_port + ESP_STATUS2);
X+ 	if ((val & 0x70) < 0x20) {
X+ 		printf("-old (%o)", val & 0x70);
X+ 		return(0);
X+ 	}
X+ 
X+ 	/* Check for ability to emulate 16550: bit 7 set */
X+ 	if (ISSET(dips, 0x80) == 0) {
X+ 		printf(" slave");
X+ 		return(0);
X+ 	}
X+ 
X+ 	/* We're a full featured ESP card at the right com port. */
X+ 	SET(sc->sc_hwflags, COM_HW_ESP);
X+ 	printf(", 1024k fifo\n");
X+ 	return(1);
X+ }
X+ #endif
X+ 
X  void
X  comattach(parent, self, aux)
X  	struct device *parent, *self;
X***************
X*** 196,201 ****
X--- 249,258 ----
X  	struct cfdata *cf = sc->sc_dev.dv_cfdata;
X  	int iobase = ia->ia_iobase;
X  	struct tty *tp;
X+ #ifdef COM_ESP
X+ 	int	esp_ports[] = { 0x140, 0x180, 0x280, 0 };
X+ 	int	*espp;
X+ #endif
X  
X  	sc->sc_iobase = iobase;
X  	sc->sc_hwflags = ISSET(cf->cf_flags, COM_HW_NOIEN);
X***************
X*** 204,209 ****
X--- 261,276 ----
X  	if (sc->sc_dev.dv_unit == comconsole)
X  		delay(1000);
X  
X+ #ifdef COM_ESP
X+ 	/* Look for a Hayes ESP board. */
X+ 	for (espp = esp_ports; *espp != 0; espp++)
X+ 		if (comprobeESP(*espp, sc)) {
X+ 			sc->sc_espbase = *espp;
X+ 			break;
X+ 		}
X+ 	/* No ESP; look for other things. */
X+ 	if (*espp == 0) {
X+ #endif
X  	/* look for a NS 16550AF UART with FIFOs */
X  	outb(iobase + com_fifo,
X  	    FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
X***************
X*** 217,222 ****
X--- 284,292 ----
X  	else
X  		printf(": ns8250 or ns16450, no fifo\n");
X  	outb(iobase + com_fifo, 0);
X+ #ifdef COM_ESP
X+ 	}
X+ #endif
X  
X  	/* disable interrupts */
X  	outb(iobase + com_ier, 0);
X***************
X*** 312,317 ****
X--- 382,415 ----
X  		sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
X  
X  		iobase = sc->sc_iobase;
X+ 
X+ #ifdef COM_ESP
X+ 		/* Set up the ESP board */
X+ 		if (ISSET(sc->sc_hwflags, COM_HW_ESP)) {
X+ 			outb(iobase + com_fifo,
X+ 			    /* XXX - bug in ESP requires DMA flag set */
X+ 			    FIFO_DMA_MODE |
X+ 			    FIFO_ENABLE | FIFO_RCV_RST |
X+ 			    FIFO_XMT_RST | FIFO_TRIGGER_8);
X+ 
X+ 			/* Set 16550 compatibility mode */
X+ 			outb(sc->sc_espbase + ESP_CMD1, ESP_SETMODE);
X+ 			outb(sc->sc_espbase + ESP_CMD2,
X+ 				ESP_MODE_FIFO | ESP_MODE_RTS | ESP_MODE_SCALE);
X+ 
X+ 			/* Set RTS/CTS flow control */
X+ 			outb(sc->sc_espbase + ESP_CMD1, ESP_SETFLOWTYPE);
X+ 			outb(sc->sc_espbase + ESP_CMD2, ESP_FLOW_RTS);
X+ 			outb(sc->sc_espbase + ESP_CMD2, ESP_FLOW_CTS);
X+ 
X+ 			/* Set flow control levels */
X+ 			outb(sc->sc_espbase + ESP_CMD1, ESP_SETRXFLOW);
X+ 			outb(sc->sc_espbase + ESP_CMD2, HIBYTE(RXHIGHWATER));
X+ 			outb(sc->sc_espbase + ESP_CMD2, LOBYTE(RXHIGHWATER));
X+ 			outb(sc->sc_espbase + ESP_CMD2, HIBYTE(RXLOWWATER));
X+ 			outb(sc->sc_espbase + ESP_CMD2, LOBYTE(RXLOWWATER));
X+ 		} else
X+ #endif
X  		/* Set the FIFO threshold based on the receive speed. */
X  		if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
X  			outb(iobase + com_fifo,
X***************
X*** 692,697 ****
X--- 790,804 ----
X  		selwakeup(&tp->t_wsel);
X  	}
X  	SET(tp->t_state, TS_BUSY);
X+ #ifdef COM_ESP
X+ 	if (ISSET(sc->sc_hwflags, COM_HW_ESP)) {
X+ 		u_char buffer[1024], *cp = buffer;
X+ 		int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
X+ 		do {
X+ 			outb(iobase + com_data, *cp++);
X+ 		} while (--n);
X+ 	} else
X+ #endif
X  	if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
X  		u_char buffer[16], *cp = buffer;
X  		int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
END-of-COMESP-PATCH
echo x - espreg.h
sed 's/^X//' >espreg.h << 'END-of-espreg.h'
X/*-
X * Copyright (c) 1995  Sean E. Fagin, John M Vinopal.
X *
X * Redistribution and use in source and binary forms, with or without
X * modification, are permitted provided that the following conditions
X * are met:
X * 1. Redistributions of source code must retain the above copyright
X *    notice, this list of conditions and the following disclaimer.
X * 2. Redistributions in binary form must reproduce the above copyright
X *    notice, this list of conditions and the following disclaimer in the
X *    documentation and/or other materials provided with the distribution.
X * 3. Neither the name of the author nor the names of contributors
X *    may be used to endorse or promote products derived from this software
X *    without specific prior written permission.
X *
X * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
X * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
X * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
X * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
X * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
X * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
X * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
X * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
X * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
X * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
X * SUCH DAMAGE.
X */
X
X#ifndef _ESPREG_H_
X#define	_ESPREG_H_
X
X/*
X * Definitions for Hayes ESP serial cards.
X */
X
X/*
X * CMD1 and CMD2 are the command ports, offsets from <esp_iobase>.
X */
X#define	ESP_CMD1	4
X#define	ESP_CMD2	5
X
X/*
X * STAT1 and STAT2 are to get return values and status bytes
X */
X#define	ESP_STATUS1	ESP_CMD1
X#define	ESP_STATUS2	ESP_CMD2
X
X/*
X * Commands.  Commands are given by writing the command value to
X * ESP_CMD1 and then writing or reading some number of bytes from
X * ESP_CMD2 or ESP_STATUS2.
X */
X#define	ESP_GETTEST	0x01	/* self-test command (1 byte + extras) */
X#define	ESP_GETDIPS	0x02	/* get on-board DIP switches (1 byte) */
X#define	ESP_SETFLOWTYPE	0x08	/* set type of flow-control (2 bytes) */
X#define	ESP_SETRXFLOW	0x0a	/* set Rx FIFO flow control levels (4 bytes) */
X#define	ESP_SETMODE	0x10	/* set board mode (1 byte) */
X
X/* Mode bits (ESP_SETMODE). */
X#define	ESP_MODE_FIFO	0x02	/* act like a 16550 (compatibility mode) */
X#define	ESP_MODE_RTS	0x04	/* use RTS hardware flow control */
X#define	ESP_MODE_SCALE	0x80	/* scale FIFO trigger levels */
X
X/* Flow control type bits (ESP_SETFLOWTYPE). */
X#define	ESP_FLOW_RTS	0x04	/* cmd1: local Rx sends RTS flow control */
X#define	ESP_FLOW_CTS	0x10	/* cmd2: local transmitter responds to CTS */
X
X/* Used by ESP_SETRXFLOW. */
X#define	RXHIGHWATER	768
X#define	RXLOWWATER	512
X#define	HIBYTE(w)	(((w) >> 8) & 0xff)
X#define	LOBYTE(w)	((w) & 0xff)
X
X#endif /* !_ESPREG_H_ */
END-of-espreg.h
exit

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