Subject: Re: cachectl
To: None <m68k@sun-lamp.cs.berkeley.edu>
From: Michael L. Hitch <osymh@gemini.oscs.montana.edu>
List: m68k
Date: 01/23/1994 14:36:04
On Jan 23, 1:00pm, Adam Glass wrote:
> > > the sun3 is a 68020 + a proprietary mmu. i didn't do/copy the
> > > cachectl stuff because i wasn't sure it would be necessary. I can
> > > make it a temporary no-op though.
> >
> > Oh, good. One of my 3/60's has a 68030 in it. Though this is not
> > normal, it is still good to leave that code in.
>
> i can drop the code back in. the basic problem is that i don't
> understand it. In particular, which part of it is real, which isn't.
> which doesn't matter on a 68020, which matters on a 68030. The
> original code has ifdefs by hp model number which don't help me any.
The only ifdefs I saw in the Amiga file was for the HP370 and dealt
with the external cache. The cachectl routine only called two routines
to deal with the cache: DCIU() and ICIA(). I think these routines are
"Data Cache Invalid User" and "Instruction Cache Invalidate All". The
Amiga routines didn't do anything in DCIU(), but I did a cpusha dc for
the 68040 in all the DCI?() routines.
The change I made to ld.so to handle the 68040 caches was to call
cachectl with CC_EXTPURGE|CC_IPURGE, since that argument would cause the
data cache to be pushed and the instruction cache invalidated.
Michael
--
Michael L. Hitch INTERNET: osymh@montana.edu
Computer Consultant BITNET: OSYMH@MTSUNIX1.BITNET
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Montana State University Bozeman, MT USA
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