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On Sat, Aug 18, 2007 at 04:53:35PM +0200, Bernd Ernesti wrote:
> On Sat, Aug 18, 2007 at 11:35:56AM +0000, Tobias Nygren wrote:
> >=20
> > Module Name:	src
> > Committed By:	tnn
> > Date:		Sat Aug 18 11:35:56 UTC 2007
> >=20
> > Modified Files:
> > 	src/sys/arch/amd64/conf: GENERIC
> > 	src/sys/arch/i386/conf: ALL GENERIC
> >=20
> > Log Message:
> > Enable spdmem(4) in ALL configuration. Add commented out entries to GEN=
ERIC
>=20
> Cool and it works with a nfsmbc:
>=20
> nfsmbc0 at pci0 dev 1 function 1: NVIDIA nForce3 250 SMBus Controller (re=
v. 0xa1)
> nfsmb0 at nfsmbc0 SMBus 1
> iic0 at nfsmb0: I2C bus
> spdmem0 at iic0 addr 0x52
> spdmem0: DDR SDRAM memory, no parity or ECC, 1024MB, 400MHz, PC3200
> spdmem0: 13 rows, 11 cols, 2 ranks, 4 banks/chip, 5.0ns cycle time
> spdmem0: voltage SSTL 2.5V, refresh time 7.8us (self-refreshing)
> spdmem1 at iic0 addr 0x53
> spdmem1: DDR SDRAM memory, no parity or ECC, 1024MB, 400MHz, PC3200
> spdmem1: 13 rows, 11 cols, 2 ranks, 4 banks/chip, 5.0ns cycle time
> spdmem1: voltage SSTL 2.5V, refresh time 7.8us (self-refreshing)
>=20
> Would it be possible to not use fixed addresses and enable spdmem
> by default?
> I thought that there was some code to scan an iic, but maybe that
> was just the spdmem code to get the spd informations.
>=20
> Regards,
> Bernd
>=20


I'm going to have to comment on this sillyness.

What exactly is the point of this code?

What is wrong with seeprom(4)?

Why is this decoding being done in kernel space?

	Jonathan Kollasch

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