Subject: Re: NVIDIA nForce2/3/4 SMBus controller
To: KIYOHARA Takashi <>
From: Brett Lymn <>
List: current-users
Date: 07/02/2007 11:45:37
On Sun, Jul 01, 2007 at 06:14:46PM +0900, KIYOHARA Takashi wrote:
> For instance, two registers of slaveaddr and read/write are used in
> nfsmb(4).  However, amdpm(4) is set to one register.  Moreover, there
> is no register like 'host start' of amdpm(4). 
> You should read {amdpm_smbus,nfsmb}_{send,write,receive,read}_1(). 

OK - but it does seem strange to me we have two drivers that do almost
the same thing.  How about setting up the send/write/receive/read
operations in the softc and selecting the correct set when the chip is

Brett Lymn