On 05/04/07, Jason Thorpe <thorpej@shagadelic.org> wrote:
>
> Ok, well, the next step is to figure out why this isn't getting mapped.
>
> Can you please run "pcictl pci1 dump -b xxx -d yyy"
>
> ...where xxx is the PCI bus number for pci1 and yyy is the PCI device
> number reported for the NeoMagic?
>
> and report back the results?

% /usr/sbin/pcictl pci1 dump -d 0 -f 1
PCI configuration registers:
  Common header:
    0x00: 0x800610c8 0x02900000 0x04010000 0x00800000

    Vendor Name: Neomagic (0x10c8)
    Device Name: MagicMedia 256ZX Audio (0x8006)
    Command register: 0x0000
      I/O space accesses: off
      Memory space accesses: off
      Bus mastering: off
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0290
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: on
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: multimedia (0x04)
    Subclass Name: audio (0x01)
    Interface: 0x00
    Revision ID: 0x00
    BIST: 0x00
    Header Type: 0x00+multifunction (0x80)
    Latency Timer: 0x00
    Cache Line Size: 0x00

  Type 0 ("normal" device) header:
    0x10: 0xf9800008 0xfda00000 0x00000000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x00911028
    0x30: 0x00000000 0x000000dc 0x00000000 0x00000205

    Base address register at 0x10
      type: 32-bit prefetchable memory
      base: 0xf9800000, not sized
    Base address register at 0x14
      type: 32-bit nonprefetchable memory
      base: 0xfda00000, not sized
    Base address register at 0x18
      not implemented(?)
    Base address register at 0x1c
      not implemented(?)
    Base address register at 0x20
      not implemented(?)
    Base address register at 0x24
      not implemented(?)
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x1028
    Subsystem ID: 0x0091
    Expansion ROM Base Address: 0x00000000
    Capability list pointer: 0xdc
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x02 (pin B)
    Interrupt line: 0x05

  Capability register at 0xdc
    type: 0x01 (Power Management, rev. 1.0)

  Device-dependent header:
    0x40: 0x00000000 0x00000000 0x00000000 0x00000000
    0x50: 0x00000000 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000000 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00210001
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

>
> -- thorpej
>
>


--
Kimi