Subject: Re: HEADS UP: timecounters (branch simonb-timecounters) merged into
To: Kouichirou Hiratsuka <hira@po6.nsk.ne.jp>
From: Frank Kardel <kardel@netbsd.org>
List: current-users
Date: 06/09/2006 13:34:42
Kouichirou Hiratsuka wrote:

>Hello,
>
>At Thu, 08 Jun 2006 01:10:26 +0200,
>Frank Kardel wrote:
>
>>Please test NetBSD-current so we can smoke out bugs early.
>>
>
>I'm using ThinkPad X32 that CPU is Intel Pentium M 745 1.8GHz.  With
>the fastest CPU clock, timecounter works fine.  But it's broken by
>the slower CPU clocks.
>
Yes, this is something I expected to happen.
Background: The implementation of TSC is
different for different CPUs. Older CPUs use the clock
frequency to drive TSC and are thus dependent on selected
frequency. Newer CPUs are said to count at a fixed frequency
regardless of the selected frequency (possibly using bigger
increments).
FreeBSD did disable TSC when some kind of Powermanagement
is detected.
Instead of TSC try using i8254:
     sysctl  -w kern.timecounter.hardware=i8254

Resolution options:
    - Find a way to detect whether TSC frequency follows cpu
      frequency if yes: no TSC for timekeeping as default that platform
    - no TSC as default when powermanagement is present
    - use other more suitable time counters (e. g. ACPI timer)

>
>1.8GHz:
>
>% sysctl -w machdep.est.frequency.target=1800
>machdep.est.frequency.target: 1000 -> 1800
>% /usr/bin/time sleep 10
>       10.00 real         0.00 user         0.00 sys
>
>600MHz:
>
>% sysctl -w machdep.est.frequency.target=600
>machdep.est.frequency.target: 1800 -> 600
>% /usr/bin/time sleep 10
>        3.33 real         0.00 user         0.00 sys
>
>With 600MHz, the command actually takes 10 seconds in real time, but
>the output of time(1) is 1/3.
>
>best regards.
>
Thanks for testing. It is a valuable data point - please try
the sysctl above. Over the time we will add APCI timers
that run at a high (~3 Mhz) frequency to avoid
(cpu frequency dependent) TSC in Powermanagement/ACPI
environments.

Frank