Subject: Re: pmap_unwire: wiring for pmap 0xfoo va 0xbar didn't change!
To: YAMAMOTO Takashi <>
From: Chuck Silvers <>
List: current-users
Date: 08/29/2005 09:57:12
On Mon, Aug 29, 2005 at 11:10:16AM +0900, YAMAMOTO Takashi wrote:
> hi,
> > the attached patch fixes this problem, by removing an optimization that would
> > incorrectly skip TLB flushes in some cases where a pmap mapping is replaced
> > with another mapping of the same page, but with different permissions.
> > skipping the TLB flush is incorrect if the new entry is supposed to be wired,
> > since a stale read-only entry that's supposed to be writable might cause
> > a fault which would replace the wired entry with a non-wired entry
> > (which is what causes the warning messages).  increasing the permissions
> > an entry is not a common occurance, so it doesn't seem worthwhile to
> > complicate the code with the optimization, thus the proposal to just
> > remove it rather than fix it.
> > 
> > any objections?
> > 
> > -Chuck
> i have no objection.
> but isn't it more generic uvm_vslock/unlock problem?
> ie. anyone can modify the mapping between uvm_vslock and uvm_vsunlock.

that's a different problem, which requires multiple LWPs in one process
to trigger (since I don't think we have any way for a process to modify
the mappings of another process).  the problem at hand can happen even with
traditional single-threaded programs.

it would be good to fix the other problem too, though.  is there a PR for it?