Subject: Re: Intel SATA RAID
To: Manuel Bouyer <firstname.lastname@example.org>
From: Jason Thorpe <email@example.com>
Date: 12/06/2003 14:31:11
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On Dec 6, 2003, at 2:16 PM, Manuel Bouyer wrote:
> On Sat, Dec 06, 2003 at 11:20:15AM -0800, Jason Thorpe wrote:
>> I don't think this patch is correct, for a couple of reasons:
>> * Do you know if this SATA controller is actually based on the
>> i31244 SATA chip (Artisea)? If it is not, then you should not
>> be using artisea_chip_map.
>> From the ICH5/5R datasheet, the registers are the same for 82801EB
>> and ER,
> and 82801EB is already using artisea_chip_map().
That's probably incorrect for anything other than the i31244 to be
using artisea_chip_map(). i31244 has another mode called "DPA mode"
which uses a much different register layout than traditional PCI IDE,
and artisea_chip_map() will be changed to support that mode one day.
Also, the i31244 has LED setup (that our driver doesn't currently do)
that will not be shared by the ICH SATA controllers.
I suggest instead that you create an "ichsata_chip_map" to handle the
ICH SATA controllers. It is simply wrong to use artisea_chip_map() for
> Note that I didn't commit this part, I assumed it was a left over from
> attempt to make it work with piixide_chip_map instead of
> The parallel IDE controller on the ICH5/5R are identical (and use the
> same device ID).
You mean it is impossible to distinguish between the ICH5 SATA and PATA
controllers? Wow, that's incredibly broken.
-- Jason R. Thorpe <firstname.lastname@example.org>
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