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On Fri, Oct 17, 2003 at 12:27:34PM +0900, NISHIO Yasuhiro wrote:
> > I just tried on my promise U100, I get them too. My U66 or U133 don't have
> > this problem, it seems to be a quirk or the U100.
> 
> uum, I'll try to use another IDE card at this week-end if I can get it.

Hi,
can you try the attached patch on your U100 ? This solves the "bogus intr"
messages for me

-- 
Manuel Bouyer <bouyer@antioche.eu.org>
     NetBSD: 23 ans d'experience feront toujours la difference
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Index: pdcide.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pdcide.c,v
retrieving revision 1.2
diff -u -r1.2 pdcide.c
--- pdcide.c	2003/10/11 17:40:15	1.2
+++ pdcide.c	2003/10/19 14:30:27
@@ -280,6 +280,8 @@
 		}
 		mode = PDC2xx_SCR_SET_I2C(mode, 0x3); /* ditto */
 		mode = PDC2xx_SCR_SET_POLL(mode, 0x1); /* ditto */
+		if (PDC_IS_265(sc))
+			mode |= 0x80001100; /* from BIOS */
 		WDCDEBUG_PRINT(("pdc202xx_setup_chip: initial SCR  0x%x, "
 		    "now 0x%x\n",
 		    bus_space_read_4(sc->sc_dma_iot, sc->sc_dma_ioh,
@@ -295,12 +297,12 @@
 		WDCDEBUG_PRINT(("pdc202xx_setup_chip: primary mode 0x%x", mode),
 		    DEBUG_PROBE);
 		bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh, PDC2xx_PM,
-		    mode | 0x1);
+		    mode & ~0x1);
 		mode =
 		    bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh, PDC2xx_SM);
 		WDCDEBUG_PRINT((", secondary mode 0x%x\n", mode ), DEBUG_PROBE);
 		bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh, PDC2xx_SM,
-		    mode | 0x1);
+		    mode & ~0x1);
 	}
 
 	for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
@@ -316,6 +318,9 @@
 		}
 		pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,
 		    PDC_IS_265(sc) ? pdc20265_pci_intr : pdc202xx_pci_intr);
+		/* clear interrupt, in case there is one pending */
+		bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
+		    IDEDMA_CTL + IDEDMA_SCH_OFFSET * channel, IDEDMA_CTL_INTR);
 	}
 	if (!PDC_IS_268(sc)) {
 		WDCDEBUG_PRINT(("pdc202xx_setup_chip: new controller state "
@@ -510,10 +515,11 @@
 			continue;
 		if (scr & PDC2xx_SCR_INT(i)) {
 			crv = wdcintr(wdc_cp);
-			if (crv == 0)
+			if (crv == 0) {
 				printf("%s:%d: bogus intr (reg 0x%x)\n",
 				    sc->sc_wdcdev.sc_dev.dv_xname, i, scr);
-			else
+				pciide_irqack(wdc_cp);
+			} else
 				rv = 1;
 		}
 	}

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