Subject: Re: i386 - Cannot boot from wd(Promise Ultra100) with infinite ``bogus inter'' msg
To: NISHIO Yasuhiro <nishio@hh.iij4u.or.jp>
From: Manuel Bouyer <bouyer@antioche.eu.org>
List: current-users
Date: 10/14/2003 23:20:33
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On Tue, Oct 14, 2003 at 11:49:08PM +0900, NISHIO Yasuhiro wrote:
> Bouyer san,
> Thank you for your reply.
> 
> > > difference between Serial console and PC console(VGA)?  If so, I'll try
> > > to use PC console.
> > 
> > Could be, I've been able to enter ddb on systems in interrupts loops from
> > PC console
> 
> uum. Using PC Console is a little bit hard for me. There is no VGA
> Display. Please gime more time to prepare it.

I think we can do without it

> > > db> trace/t 0t4
> > > trace: pid 4 at 0x0
> > 
> > Hum, this is bad. 
> > BTW, I've got another idea. Can you set a break point on atabusconfig(),
> > and then step util the problem occurs ?
> 
> Yes, I can. The full log is 1.3MB. Would you pleae check at

thanks !
It seems it starts looping when RST is asserted. Strange.
Can you try the attached patch ?

-- 
Manuel Bouyer <bouyer@antioche.eu.org>
     NetBSD: 24 ans d'experience feront toujours la difference
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Index: wdc.c
===================================================================
RCS file: /cvsroot/src/sys/dev/ic/wdc.c,v
retrieving revision 1.140
diff -u -r1.140 wdc.c
--- wdc.c	2003/10/12 19:28:50	1.140
+++ wdc.c	2003/10/14 21:14:19
@@ -691,19 +691,23 @@
 	/* assert SRST, wait for reset to complete */
 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
 	    WDSD_IBM);
+	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
+	    WDCTL_IDS | WDCTL_4BIT);  /* disable interrupts */
 	delay(10);	/* 400ns delay */
 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
 	    WDCTL_RST | WDCTL_IDS | WDCTL_4BIT); 
 	DELAY(2000);
 	(void) bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_error);
-	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
+	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
+	    WDCTL_IDS | WDCTL_4BIT); 
 	delay(10);	/* 400ns delay */
 
 	ret_value = __wdcwait_reset(chp, ret_value, poll);
 	WDCDEBUG_PRINT(("%s:%d: after reset, ret_value=0x%d\n",
 	    chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe", chp->channel,
 	    ret_value), DEBUG_PROBE);
-
+	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
+	    WDCTL_4BIT);  /* enable interrupts */
 	/* if reset failed, there's nothing here */
 	if (ret_value == 0)
 		return 0;
@@ -1086,13 +1090,15 @@
 		chp->wdc->select(chp,0);
 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
 	    WDSD_IBM); /* master */
+	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
+	    WDCTL_IDS | WDCTL_4BIT);  /* disable interrupts */
 	delay(10);	/* 400ns delay */
 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
 	    WDCTL_RST | WDCTL_IDS | WDCTL_4BIT);
 	delay(2000);
 	(void) bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_error);
 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
-	    WDCTL_4BIT | WDCTL_IDS);
+	    WDCTL_IDS | WDCTL_4BIT);
 	delay(10);	/* 400ns delay */
 
 	drv_mask1 = (chp->ch_drive[0].drive_flags & DRIVE) ? 0x01:0x00;

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