... we've got a ServerWorks chipset board with
ADAPTEC aic-7901 onboard chip.
It does not work properly. 
As I assume it looks like a 2nd controller BIOS revison.
Has anybody this controller running under FreeBSD ? 

andreas


---------------------------------
PCI configuration registers:
Common header:
0x00: 0x809e9005 0x02300147 0x01040003 0x00002008

Vendor Name: Adaptec (2nd PCI Vendor ID) (0x9005)
	Device ID: 0x809e
> >     Command register: 0x0147
> >       I/O space accesses: on
> >       Memory space accesses: on
> >       Bus mastering: on
> >       Special cycles: off
> >       MWI transactions: off
> >       Palette snooping: off
> >       Parity error checking: on
> >       Address/data stepping: off
> >       System error (SERR): on
> >       Fast back-to-back transactions: off
> >     Status register: 0x0230
> >       Capability List support: on
> >       66 MHz capable: on
> >       User Definable Features (UDF) support: off
> >       Fast back-to-back capable: off
> >       Data parity error detected: off
> >       DEVSEL timing: medium (0x1)
> >       Slave signaled Target Abort: off
> >       Master received Target Abort: off
> >       Master received Master Abort: off
> >       Asserted System Error (SERR): off
> >       Parity error detected: off
> >     Class Name: mass storage (0x01)
> >     Subclass Name: RAID (0x04)
> >     Interface: 0x00
> >     Revision ID: 0x03
> >     BIST: 0x00
> >     Header Type: 0x00 (0x00)
> >     Latency Timer: 0x20
> >     Cache Line Size: 0x08
> > 
> >   Type 0 ("normal" device) header:
> >     0x10: 0x00003001 0xfeafe004 0x00000000 0x00003401
> >     0x20: 0x00000000 0x00000000 0x00000000 0x809e1734
> >     0x30: 0xfea00000 0x000000dc 0x00000000 0x19280105
> > 
> >     Base address register at 0x10
> >       type: i/o
> >       base: 0x00003000, not sized
> >     Base address register at 0x14
> >       type: 64-bit nonprefetchable memory
> >       base: 0x00000000feafe000, not sized
> >     Base address register at 0x1c
> >       type: i/o
> >       base: 0x00003400, not sized
> >     Base address register at 0x20
> >       not implemented(?)
> >     Base address register at 0x24
> >       not implemented(?)
> >     Cardbus CIS Pointer: 0x00000000
> >     Subsystem vendor ID: 0x1734
> >     Subsystem ID: 0x809e
> >     Expansion ROM Base Address: 0xfea00000
> >     Capability list pointer: 0xdc
> >     Reserved @ 0x38: 0x00000000
> >     Maximum Latency: 0x19
> >     Minimum Grant: 0x28
> >     Interrupt pin: 0x01 (pin A)
> >     Interrupt line: 0x05
> > 
> >   Capability register at 0xdc
> >     type: 0x01 (Power Management, rev. 1.0)
> >   Capability register at 0xa0
> >     type: 0x05 (MSI)
> >   Capability register at 0x94
> >     type: 0x07 (PCI-X)
> > 
> >   Device-dependent header:
> >     0x40: 0x0000e3c6 0x00000000 0x00000000 0x00000000
> >     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
> >     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
> >     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
> >     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
> >     0x90: 0x00000000 0x00420007 0x0603fff8 0x00000000
> >     0xa0: 0x00829405 0x00000000 0x00000000 0x00000000
> >     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
> >     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
> >     0xd0: 0x00000000 0x00000000 0x00000000 0x0002a001
> >     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
> >     0xf0: 0x00000000 0x00000000 0x0c000000 0x00000000
> > 
> 
> 
> -- 
> 
> 
> ----------
> CYCLING o-O
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