Subject: Re: detect arithmetic overflow
To: Christos Zoulas <>
From: Johnny Billquist <>
List: current-users
Date: 08/06/2003 16:50:28
On Wed, 6 Aug 2003, Christos Zoulas wrote:

> In article <Pine.LNX.4.21.0308061116010.7039-100000@Tempo.Update.UU.SE>,
> Johnny Billquist <> wrote:
> >On Wed, 6 Aug 2003, David Laight wrote:
> >
> >> > It's even easier than that. For signed addition, just check if the result
> >> > is negative. If so, then you have overflow. For unsigned addition, you'll
> >> > have to test it as you described, though.
> >> 
> >> errmm  -1 + -1 = -2 but hasn't overflowed
> >
> >Argh. My brain is positive. :-)
> >However, the result is also less than both operands... So you just flunked
> >yourself too. :-)
> >
> >Actually, you need the opposite test for negative operands, and if the
> >operands have different sign, you will not get overflow.
> Isn't the two's complement arithmetic rule for overflow that the carry bit
> into the signed bit must equal to the carry bit out of the signed bit?

The person in this case cannot examine the carry bit. Otherwise it's
normally much easier to check the overflow bit. :-)

I'm not sure I understand your sentence though. But something similar is
one rule for setting the overflow bit in processors.

To quote my PDP-11 processor handbook:

When using double-operand instructions, such as ADD, SUB or CMP, in which
both the source and destination have like signs, a change of sign in the
result indicates an overflow condition.
Another method used by the CPU is to test the N bit and C bit when dealing
with shift and rotate instructions.
. If only the N bit is set, an overflow exists.
. If only the C bit is set, an overflow exists.
. If both the N and C bits are set, there is no overflow condition.

(The N bit says what sign we have)


Johnny Billquist                  || "I'm on a bus
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