On Fri, 13 Jun 2003, Frank van der Linden wrote:

> > ioapic0: enabling
> > ioapic0: int3 1d1<vector=d1,delmode=1,dest=0> 0<target=0>
> > ioapic0: int4 1d0<vector=d0,delmode=1,dest=0> 0<target=0>
> > ioapic0: int6 161<vector=61,delmode=1,dest=0> 0<target=0>
> > ioapic0: int11 f170<vector=70,delmode=1,pending,actlo,irrpending,level,dest=0> 0<target=0>
> > ioapic0: int14 160<vector=60,delmode=1,dest=0> 0<target=0>
> 
> I think int11 may be the culprit. It has 'pending' and 'irrpending'
> set already; sometimes this indicates that an interrupt is marked
> with the wrong polarity. In this case, that's strange, though.
> The interrupt is marked as active low, which would be correct
> for PCI. It would be strange if that board has active-high PCI
> interrupts.

I noticed that the masked bit is not set, perhaps the device is chatty and 
the local APIC accepted the interrupt.

0xf170 & (1 << 16) = 0

Does NetBSD disable interrupts during the entire initial IOAPIC 
programming sequence?

Regards,
	Zwane
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