Thu, Oct 31, 2002 at 06:17:07PM -0600, Jolan Luff:
> On Thu, Oct 31, 2002 at 03:52:58PM -0800, john heasley wrote:
> > the pci cbb is the one that lucent sells to service a wavelan card.  in
> > the tyan board it claims to have difficulty finding an interrupt (no idea
> > what cbb1 is).
> 
> you might want to try turning on pcibios and apic code with
> verbosity to help track down what exactly is going on.

with FIXUP (and FIXUP_FORCE) turned on, it seems to fix what appears
to be a bad address (devices 6 and 7 [newer and original versions of
the card]).  but, no love.  the cardbus memory regions are still 0x0.

mind wielding your clue x 4 again?

BIOS32 rev. 0 found at 0xfd6b0
PCI BIOS rev. 2.1 found at 0xfd7d0
pcibios: config mechanism [1][x], special cycles [x][x], last bus 2
PCI IRQ Routing Table rev. 1.0 found at 0xfdef0, size 0 bytes (-2 entries)
pcibios_pir_init: bad IRQ table size
PCI BIOS has 13 Interrupt Routing table entries
PIR Entry 0:
	...
PIR Entry 9:
        Bus: 2  Device: 6
                INTA: link 0x03 bitmap 0xdef8
                INTB: link 0x04 bitmap 0xdef8
                INTC: link 0x01 bitmap 0xdef8
                INTD: link 0x02 bitmap 0xdef8
PIR Entry 10:
        Bus: 2  Device: 7
                INTA: link 0x04 bitmap 0xdef8
                INTB: link 0x01 bitmap 0xdef8
                INTC: link 0x02 bitmap 0xdef8
                INTD: link 0x03 bitmap 0xdef8
	...

pci_intr_fixup: no compatible PCI ICU found
Warning: unable to fix up PCI interrupt routing
PCI fixup examining 1022:700c
PCI fixup examining 1022:700d
PCI fixup examining 1002:4742
PCI bridge 0: primary 0, secondary 1, subordinate 1
PCI fixup examining 1022:7440
PCI fixup examining 1022:7441
PCI fixup examining 1022:7443
PCI fixup examining 1022:7448
PCI fixup examining 1022:7449
PCI fixup examining 104c:ac50
PCI bridge 2: primary 2, secondary 3, subordinate 3
PCI fixup examining 104c:ac1c
PCI bridge 3: primary 2, secondary 4, subordinate 4
PCI fixup examining 104c:ac1c
PCI bridge 4: primary 2, secondary 5, subordinate 5
PCI fixup examining 10b7:9200
PCI bridge 1: primary 0, secondary 2, subordinate 5
PCI bus #5 is the last bus
[System BIOS Setting]-----------------------
	...
000:00:0 0x1022 0x700c 
        14h mem  0xfe300000 0x00001000
        18h port 0x00001010 0x00000004
                [OK]
000:01:0 0x1022 0x700d 
                [OK]
000:07:0 0x1022 0x7440 
                [OK]
000:07:1 0x1022 0x7441 
        20h port 0x0000f000 0x00000010
                [OK]
000:07:3 0x1022 0x7443 
                [OK]
000:16:0 0x1022 0x7448 
                [OK]
001:05:0 0x1002 0x4742 
        10h mem  0xfd000000 0x01000000
        14h port 0x00002000 0x00000100
        18h mem  0xfc000000 0x00001000
                [OK]
002:00:0 0x1022 0x7449 
        10h mem  0xfe000000 0x00001000
                [OK]
002:06:0 0x104c 0xac50 
        10h mem  0x00000000 0x00001000
                [NG]
002:07:0 0x104c 0xac1c 
        10h mem  0x00000000 0x00001000
                [NG]
002:07:1 0x104c 0xac1c 
        10h mem  0x00000000 0x00001000
                [NG]
002:08:0 0x10b7 0x9200 
        10h port 0x00003000 0x00000080
        14h mem  0xfe001000 0x00000080
                [OK]
--------------------------[  3 devices bogus]
 Physical memory end: 0x1ff60000
 PCI memory mapped I/O space start: 0x20000000
[PCIBIOS fixup stage]-----------------------
  device vendor product
  register space address    size
--------------------------------------------
000:00:0 0x1022 0x700c 
        14h mem  0xfe300000 0x00001000
        18h port 0x00001010 0x00000004
                [OK]
000:01:0 0x1022 0x700d 
                [OK]
000:07:0 0x1022 0x7440 
                [OK]
000:07:1 0x1022 0x7441 
        20h port 0x0000f000 0x00000010
                [OK]
000:07:3 0x1022 0x7443 
                [OK]
000:16:0 0x1022 0x7448 
                [OK]
001:05:0 0x1002 0x4742 
        10h mem  0xfd000000 0x01000000
        14h port 0x00002000 0x00000100
        18h mem  0xfc000000 0x00001000
                [OK]
002:00:0 0x1022 0x7449 
        10h mem  0xfe000000 0x00001000
                [OK]
002:06:0 0x104c 0xac50 
        10h mem  0x20000000 0x00001000
                [OK]
002:07:0 0x104c 0xac1c 
        10h mem  0x20001000 0x00001000
                [OK]
002:07:1 0x104c 0xac1c 
        10h mem  0x20002000 0x00001000
                [OK]
002:08:0 0x10b7 0x9200 
        10h port 0x00003000 0x00000080
        14h mem  0xfe001000 0x00000080
                [OK]
--------------------------[  0 devices bogus]
	...
cbb0 at pci2 dev 6 function 0: PCI configuration registers:
  Common header:
    0x00: 0xac50104c 0x02100007 0x06070001 0x00020000

    Vendor Name: Texas Instruments (0x104c)
    Device Name: PCI1410 PCI-CardBus Bridge (0xac50)
    Command register: 0x0007
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
    Status register: 0x0210
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: bridge (0x06)
    Subclass Name: CardBus (0x07)
    Interface: 0x00
    Revision ID: 0x01
    BIST: 0x00
    Header Type: 0x02 (0x02)
    Latency Timer: 0x00
    Cache Line Size: 0x00

  Type 2 (PCI-CardBus bridge) header:
    0x10: 0x20000000 0x020000a0 0x00030302 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x00000000
    0x30: 0x00000000 0x00000000 0x00000000 0x034001ff
    0x40: 0x3000133f 0x00000001

    Base address register at 0x10 (CardBus socket/ExCA registers)
      type: 32-bit nonprefetchable memory
      base: 0x20000000, size: 0x00001000
    Capability list pointer: 0xa0
    Secondary status register: 0x0200
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detection: off
      DEVSEL timing: medium (0x1)
      PCI target aborts terminate CardBus bus master transactions: off
      CardBus target aborts terminate PCI bus master transactions: off
      Bus initiator aborts terminate initiator transactions: off
      System error: off
      Parity error: off
    PCI bus number: 0x02
    CardBus bus number: 0x03
    Subordinate bus number: 0x03
    CardBus latency timer: 0x00
    CardBus memory region 0:
      base register:  0x00000000
      limit register: 0x00000000
    CardBus memory region 1:
      base register:  0x00000000
      limit register: 0x00000000
    CardBus I/O region 0:
      base register:  0x00000000
      limit register: 0x00000000
    CardBus I/O region 1:
      base register:  0x00000000
      limit register: 0x00000000
    Interrupt line: 0xff
    Interrupt pin: 0x01 (pin A)
    Bridge control register: 0x0340
      Parity error response: off
      CardBus SERR forwarding: off
      ISA enable: off
      VGA enable: off
      CardBus master abort reporting: off
      CardBus reset: on
      Functional interrupts routed by ExCA registers: off
      Memory window 0 prefetchable: on
      Memory window 1 prefetchable: on
      Write posting enable: off
    Subsystem vendor ID: 0x133f
    Subsystem ID: 0x3000
    Base address register at 0x44 (legacy-mode registers)
      type: 32-bit i/o
      base: 0x00000000, size: 0x00000004

  Capability register at 0xa0
    type: 0x01 (Power Management, rev. 1.0)

  Device-dependent header:
    0x48: 0x00000000 0x00000000
    0x50: 0x00000000 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x08449060 0x00000000 0x00000000 0x00001d92
    0x90: 0x600200c0 0x00000000 0x00000000 0x00000000
    0xa0: 0xfe110001 0x00c00000 0x0000000a 0x0000001f
    0xb0: 0x08000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

    Don't know how to pretty-print device-dependent header.

Texas Instruments PCI1410 PCI-CardBus Bridge (CardBus bridge, revision 0x01) at 
? dev 6 function 0 (tag 0x80023000, intrtag 0x80008000, intrswiz 0x6, intrpin 0x
3, i/o on, mem on, no quirks): Texas Instruments PCI1410 PCI-CardBus Bridge (rev
. 0x01)
cbb0: NOT USED because of unconfigured interrupt
cbb1 at pci2 dev 7 function 0: PCI configuration registers:
  Common header:
    0x00: 0xac1c104c 0x02100007 0x06070001 0x00820000

    Vendor Name: Texas Instruments (0x104c)
    Device Name: PCI1225 PCI-CardBus Bridge (0xac1c)
    Command register: 0x0007
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
    Status register: 0x0210
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: bridge (0x06)
    Subclass Name: CardBus (0x07)
    Interface: 0x00
    Revision ID: 0x01
    BIST: 0x00
    Header Type: 0x02+multifunction (0x82)
    Latency Timer: 0x00
    Cache Line Size: 0x00

  Type 2 (PCI-CardBus bridge) header:
    0x10: 0x20001000 0x020000a0 0x00040402 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x00000000
    0x30: 0x00000000 0x00000000 0x00000000 0x034001ff
    0x40: 0x2023133f 0x00000001

    Base address register at 0x10 (CardBus socket/ExCA registers)
      type: 32-bit nonprefetchable memory
      base: 0x20001000, size: 0x00001000
    Capability list pointer: 0xa0
    Secondary status register: 0x0200
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detection: off
      DEVSEL timing: medium (0x1)
      PCI target aborts terminate CardBus bus master transactions: off
      CardBus target aborts terminate PCI bus master transactions: off
      Bus initiator aborts terminate initiator transactions: off
      System error: off
      Parity error: off
    PCI bus number: 0x02
    CardBus bus number: 0x04
    Subordinate bus number: 0x04
    CardBus latency timer: 0x00
    CardBus memory region 0:
      base register:  0x00000000
      limit register: 0x00000000
    CardBus memory region 1:
      base register:  0x00000000
      limit register: 0x00000000
    CardBus I/O region 0:
      base register:  0x00000000
      limit register: 0x00000000
    CardBus I/O region 1:
      base register:  0x00000000
      limit register: 0x00000000
    Interrupt line: 0xff
    Interrupt pin: 0x01 (pin A)
    Bridge control register: 0x0340
      Parity error response: off
      CardBus SERR forwarding: off
      ISA enable: off
      VGA enable: off
      CardBus master abort reporting: off
      CardBus reset: on
      Functional interrupts routed by ExCA registers: off
      Memory window 0 prefetchable: on
      Memory window 1 prefetchable: on
      Write posting enable: off
    Subsystem vendor ID: 0x133f
    Subsystem ID: 0x2023
    Base address register at 0x44 (legacy-mode registers)
      type: 32-bit i/o
      base: 0x00000000, size: 0x00000004

  Capability register at 0xa0
    type: 0x01 (Power Management, rev. 1.0)

  Device-dependent header:
    0x48: 0x00000000 0x00000000
    0x50: 0x00000000 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x28449060 0x00000000 0x00000000 0x0cc07d92
    0x90: 0x606000c0 0x00000000 0x00000000 0x00000000
    0xa0: 0x7e210001 0x00800000 0x0000000e 0x0000000b
    0xb0: 0x08000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

    Don't know how to pretty-print device-dependent header.

Texas Instruments PCI1225 PCI-CardBus Bridge (CardBus bridge, revision 0x01) at ? dev 7 function 0 (tag 0x80023800, intrtag 0x80008000, intrswiz 0x7, intrpin 0x4, i/o on, mem on, no quirks): Texas Instruments PCI1225 PCI-CardBus Bridge (rev. 0x01)
cbb1: NOT USED because of unconfigured interrupt
cbb2 at pci2 dev 7 function 1: PCI configuration registers:
  Common header:
    0x00: 0xac1c104c 0x02100007 0x06070001 0x00820000

    Vendor Name: Texas Instruments (0x104c)
    Device Name: PCI1225 PCI-CardBus Bridge (0xac1c)
    Command register: 0x0007
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
    Status register: 0x0210
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: bridge (0x06)
    Subclass Name: CardBus (0x07)
    Interface: 0x00
    Revision ID: 0x01
    BIST: 0x00
    Header Type: 0x02+multifunction (0x82)
    Latency Timer: 0x00
    Cache Line Size: 0x00

  Type 2 (PCI-CardBus bridge) header:
    0x10: 0x20002000 0x020000a0 0x00050502 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x00000000
    0x30: 0x00000000 0x00000000 0x00000000 0x034001ff
    0x40: 0x2023133f 0x00000001

    Base address register at 0x10 (CardBus socket/ExCA registers)
      type: 32-bit nonprefetchable memory
      base: 0x20002000, size: 0x00001000
    Capability list pointer: 0xa0
    Secondary status register: 0x0200
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detection: off
      DEVSEL timing: medium (0x1)
      PCI target aborts terminate CardBus bus master transactions: off
      CardBus target aborts terminate PCI bus master transactions: off
      Bus initiator aborts terminate initiator transactions: off
      System error: off
      Parity error: off
    PCI bus number: 0x02
    CardBus bus number: 0x05
    Subordinate bus number: 0x05
    CardBus latency timer: 0x00
    CardBus memory region 0:
      base register:  0x00000000
      limit register: 0x00000000
    CardBus memory region 1:
      base register:  0x00000000
      limit register: 0x00000000
    CardBus I/O region 0:
      base register:  0x00000000
      limit register: 0x00000000
    CardBus I/O region 1:
      base register:  0x00000000
      limit register: 0x00000000
    Interrupt line: 0xff
    Interrupt pin: 0x01 (pin A)
    Bridge control register: 0x0340
      Parity error response: off
      CardBus SERR forwarding: off
      ISA enable: off
      VGA enable: off
      CardBus master abort reporting: off
      CardBus reset: on
      Functional interrupts routed by ExCA registers: off
      Memory window 0 prefetchable: on
      Memory window 1 prefetchable: on
      Write posting enable: off
    Subsystem vendor ID: 0x133f
    Subsystem ID: 0x2023
    Base address register at 0x44 (legacy-mode registers)
      type: 32-bit i/o
      base: 0x00000000, size: 0x00000004

  Capability register at 0xa0
    type: 0x01 (Power Management, rev. 1.0)

  Device-dependent header:
    0x48: 0x00000000 0x00000000
    0x50: 0x00000000 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x28449060 0x00000000 0x00000000 0x0cc07d92
    0x90: 0x606000c0 0x00000000 0x00000000 0x00000000
    0xa0: 0x7e210001 0x00800000 0x0000000e 0x0000000b
    0xb0: 0x08000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

    Don't know how to pretty-print device-dependent header.

Texas Instruments PCI1225 PCI-CardBus Bridge (CardBus bridge, revision 0x01) at ? dev 7 function 1 (tag 0x80023900, intrtag 0x80008000, intrswiz 0x7, intrpin 0x4, i/o on, mem on, no quirks): Texas Instruments PCI1225 PCI-CardBus Bridge (rev. 0x01)
cbb2: NOT USED because of unconfigured interrupt