Subject: x87 floating-point overlap with MMX/SSE
To: None <firstname.lastname@example.org, email@example.com>
From: Thor Lancelot Simon <firstname.lastname@example.org>
Date: 07/20/2001 17:30:50
On Fri, Jul 20, 2001 at 04:40:32PM -0400, Bill Sommerfeld wrote:
> The MMX registers (introduced in pentium mmx and pentium II) are
> *architecturally defined* to overlap with the x87 floating point
> With the Pentium III, Intel introduced *another* extension (SSE,
> sometimes referred to as MMX2 or XMM), with new registers which do not
> overlap; NetBSD does not yet save these registers. This extension is
> not MMX.
> Intel subsequently extended SSE to SSE2 in the pentium 4.
Interestingly, SSE2 includes register-to-register scalar floating point
operations -- in other words, with SSE2, you can ditch the hoary old
stack-based x87 floating point architecture alltogether. SSE2 is really
a whole new FPU architecture for the x86. With kernel and compiler support,
you can achieve significantly better floating-point performance with SSE2
than with anyone's implementation of x87 stack floating point; this is
one of the major wins of the much-misunderstood Pentium 4.
Thor Lancelot Simon email@example.com
And now he couldn't remember when this passion had flown, leaving him so
foolish and bewildered and astray: can any man?