Just to summarize, the output I propose would look like:

pciide0 at pci0 dev 8 function 0: CMD Technology PCI0640
pciide0: controller does not support bus-master DMA
pciide0: primary channel wired to compatibility mode
wd0 at pciide0 channel 0 drive 0: <ST51270A>
wd0: 1223MB, 2485 cyl, 16 head, 63 sec, 512 bytes/sect x 2504880 sectors
wd0: drive supports PIO mode 4, DMA mode 2
wd0: using 32-sector transfers, LBA addressing, PIO mode 4
wd1 at pciide0 channel 0 drive 1: <QUANTUM LPS540A>
wd1: 516MB, 1120 cyl, 16 head, 59 sec, 512 bytes/sect x 1057280 sectors
wd1: drive supports PIO mode 3, DMA mode 1
wd1: using 8-sector transfers, LBA addressing, PIO mode 3
pciide0: secondary channel wired to compatibility mode
pciide0: secondary channel disabled

which is hopefully unambiguous to everyone and not too verbose.