Subject: Re: silo overflows, was fifo overruns
To: Jason Thorpe <firstname.lastname@example.org>
From: James Graham - Systems Mangler <email@example.com>
Date: 11/12/1997 19:37:46
Jason Thorpe sez:
* > Ah, yes, but what kind of serial I/O did it have? Certainly not the
* > zs8530 which, while supporting two serial ports, only has a two-and-a-
* > half byte Hardware FIFO for each port (two bytes of FIFO and a third
* > to hold the one that's coming in).
* Um, all SPARCs have 8530-based serial ports.
Well, yes, but he was talking about Macs, which I now understand have
the same hardware.
I think we've been this go-round before, with input from Chris Torek
[Hiya, Chris! :-)] suggesting the very same thing that's "coming to
light" now, i.e., that the interrupts are not being serviced quickly
I believe the change in performance came during the major MD->MI migration
which was, IIRC, sometime around 1.2C[?] which was [IIRC] October/November/
I'm completely baffled as to why only now we're getting around to
discussing it when it's been a problem for the last year.
[Damn -- can't seem to stop the initially self-referential paragraphs.
Sorry; I'm not an egotist, really!]
One thing I _did_ discover was that upping splzs from 12 to 14 most
certainly does NOT affect the problem. Something else is just holding
onto a high-level interrupt.
Putting two and two together, I wonder if it's the statclock, since I
seem to remember something about 'vmstat/pstat finally working right'
at just about the same time the serial ports "broke" -- is there
something in that, or am I seeing smoke here?
A whole wide world, an endless universe/Yet we keep looking thru the eyeglass
in reverse/Don't feed the people but we feed the machines/Can't really feel
what "international" means/In different circles we keep holding our ground/
Indifferent circles we keep spinning round and round and round//