Subject: Re: Masking out irqs with PCIC_ISA_INTR_ALLOC_MASK in pcmcia subsystem
To: John Kohl <email@example.com>
From: Chris G. Demetriou <firstname.lastname@example.org>
Date: 11/10/1997 10:15:59
> >>>>> "EH" == "Eric S Hvozda" <email@example.com> writes:
> EH> I understand I can mask this irq out with PCIC_ISA_INTR_ALLOC_MASK.
> EH> However it's not readily apparent to me how 0xfbff masks irq 10
> EH> as documented in /sys/dev/isa/i82365_isa.c. By my calculations
> EH> it would seem this just masks irq 4; so surely I must be missing the
> EH> bigger picture...
> Think "little endian short" and "count from zero", e.g. ~(1 << 10).
Why do you need to think "little endian"? 0xfbff is ~(1<<10)
regardless of endianness. 0xfbff says nothing about the order that
bits are stored in memory... 8-)