Subject: Re: Masking out irqs with PCIC_ISA_INTR_ALLOC_MASK in pcmcia subsystem
To: None <hvozda@netcom.com>
From: John Kohl <jtk@kolvir.arlington.ma.us>
List: current-users
Date: 11/10/1997 09:05:45
>>>>> "EH" == "Eric S Hvozda" <hvozda@netcom.com> writes:

EH> I understand I can mask this irq out with PCIC_ISA_INTR_ALLOC_MASK.

EH> However it's not readily apparent to me how 0xfbff masks irq 10
EH> as documented in /sys/dev/isa/i82365_isa.c.  By my calculations
EH> it would seem this just masks irq 4; so surely I must be missing the
EH> bigger picture...

Think "little endian short" and "count from zero", e.g. ~(1 << 10).

-- 
==John Kohl <jtk@kolvir.arlington.ma.us>, <john_kohl@alum.mit.edu>
See also <http://jtk.ne.mediaone.net/~jtk/>
Now that I'm Fteen (0x1f), time to look forward to my 0x20's