had to disable my onboard cache to get NetBSD to run.
its a MP5-TRI from PCPartner. triton chipset.

I have jumper options to control:

	L1 cache protocol (write back (default) or write through)
	L2 cache size (0,256,512 (selected)
	
There are also BIOS options for DRAM modes stuff. I left these alone
and used BIOS to disable external cache.

Is there a lucid description of whats going on here online anywhere?
compile options to get cache used properly?

(behavior was crash on panic during system startup)

-George