Subject: Re: Interrupt handling
To: David Maxwell <email@example.com>
From: John F. Woods <firstname.lastname@example.org>
Date: 11/08/1994 09:52:43
> I'm really asking an i386 question here, but I sent this to current-users
> since it may or may not apply to each 'arch' individually.
> Does the kernel support multiple devices configured on the same interrupt?
I'll try to give an architecture-independant answer.
There's no reason why the kernel won't support multiple devices on the
same interrupt priority level, as long as each device has its own interrupt
Of course, here we stumble into architecture dependance: the Motorola
family has each device generate a separate vector number, independant of
the interrupt priority level (and has a choice of almost 200 device
interrupt vectors). Then Intel family, of course, ties the priority
to the vector (if I recall correctly, the processor itself doesn't even
have a "vector number" or even a priority level, it has to poll an
external chip to find out the priority level, which directly implies
a vector number). Other processor families may have different behaviors.
Fire bombs may be addressed to Intel's corporate headquarters (remember
to save some for IBM's PC group for not trying to add vectored interrupts
to the ISA bus with their own custom silicon...).
That said, I believe that some devices are able to share interrupts, but
the device has to be carefully designed to make that work (easy to poll
for interrupt status, etc.). A randomly chosen ISA bus board will not
necessarily be able to make that work. (I seem to recall there's a version
of the COM device driver that shares interrupts.)