I've just removed most of this code by default.  I've been told that
many Cyrix-based machines have broken cache logic and need either
explicit cache invalidations or complete disabling of the cache.  The
former should probably be done, but the latter just doesn't seem
reasonable as a default for everyone.

So, I've implemented the following compromise:

1) The bit which disables caching of the ISA `hole' area is always
set.

2) If caching doesn't work correctly on your machine, you can turn it
off using the BIOS setup utility that came with your machine.  I'm not
going to try to intuit what the right thing is from the limited view I
have from the inside of your CPU.

3) Eventually the explicit cache invalidations should be added anyway,
but I'm not going to do it today.  (Feel free to volunteer!)

Anyway, if you've had trouble with a DLC-based machine, you should
probably try the updated code after tonight's SUP.


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