Drew Hess <dhess@CS.Stanford.EDU> wrote:
> Mark P. Gooderum writes:
> > 
> > But on clock speed versus memory speed, remember that a 486 still isn't
> > any where close to a RISC chip in cycles per instruction ratio.
> > 
> 
> 
> Well, this is a topic for another place, but cycles/instruction is not 
> necessarily a good benchmark for comparing architectures-- especially
> when comparing load/store (e.g. "RISC") architectures to register/memory
> (e.g. x86) architectures.

I think you missed the point.  The point is: a high cycles per
instruction ratio means that having the internal clock be twice as
fast as the external clock is likely to make a big difference in
overall performance.

	Mark
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Email: Mark_Weaver@brown.edu           | Brown University
PGP Key: finger mhw@cs.brown.edu       | Dept of Computer Science

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