Subject: Re: None
To: None <firstname.lastname@example.org, email@example.com>
From: Olaf Seibert <firstname.lastname@example.org>
Date: 12/04/1995 16:50:01
> > I recall that there was a technique using two 68000 processors that is
> > different from the one already mentioned. This techique would use the
> > first 68000 to run most code, and then when it hits a bus error it is
> > simply stalled. The second processor fixes up the mess and then lets
> > the first one continue.
> The 68000 can't resume instruction execution after an exception in the
> middle of the instruction. The internal CPU state is not completely
> saved on stack, so the CPU can't finish the instruction after the
The trick here was that there is nothing saved on the stack. The
processor is simply left waiting in the middle of the bus access,
as I understand it. Until it can continue and actually perform the
access and the rest of the instruction.
___ Copyright 1995 Olaf 'Rhialto' Seibert. All Rights Reserved.
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