> 
> > 	Anyways, about blitting and such. I'd like to
> > see ioctls on the view device for all accelerated graphics
> > functions. We will regret not putting them in there once 'true'
> > accelerators come out for the amiga. (like the S3 chipset)
> > Right now, most of the boards use the Cirrus chip,
> 
> Hmm... as far as I know, there's only the Picasso II using
> Cirrus chips, or am I wrong?

	Actually the GVP and the Picollo use Cirrus logic
as well.

> > Why couldn't we write an interrupt driven queueing blitter
> > driver?
> 
> An interesting idea, but the queue would have to be managed
> from within the X-server, how could you synchronize CPU-accesses
> to the frame-buffer memory otherwise?
> 
> Another point is, that the (often occuring) small blits would
> not benefit from the queueing, the time a context switch takes
> is often longer than the whole blit.
> 

	I wasn't sure if sync. was necessary or not. Sounds like
it is though... It's probably better just to let the X server
sleep on an ioctl until the operation is completed. It maintains
an internal queue of requests anyways...

	-Phil

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