Subject: HW question & sbic sync patch
To: None <amiga-dev@sun-lamp.cs.berkeley.edu>
From: Niklas Hallqvist <niklas@appli.se>
List: amiga-dev
Date: 08/19/1994 05:25:32
Hi all!
First of all, I have a question on how to best handle an amiga
hardware problem: On the A2000 the Z2 space will get cached by
the CPU from what I've heard. Now if one have volatile registers
somewhere in that space, one can lose severly. I'm writing
support for a bridgecard which autoconfigs 1M of the Z2 space
where such registers exist. Is it possible to, in a CPU-
independent way, to ensure data cacheing is off in at least
the autoconfigured region during device driver execution.
How about cachectl? Is it an expensive operation to toggle
data cacheing on a region? Is it possible on 020s and 030s?
I rather control this as fine-grained as possible, both in time
and in space, as I don't want to turn off cacheing entirely.
Second, I've missed fine-grained sync-control ever since it was
removed. Here's my stab to reintroduce it for the sbic
controllers. What I do, is to enumerate all your sbic
controllers starting with zero. If you want to enable sync
on controller CTLR target TGT then binpatch your kernel with:
binpatch -b -s _sbic_enable_sync -o OFFSET -r 1 netbsd
where OFFSET = 8 * CTLR + TGT. To make it clear which controller
is which in the enumeration, I print it out during the autoconfig
phase of booting.
Enjoy!
Niklas
===================================================================
RCS file: /home2/CVSROOT/NetBSD/sys/arch/amiga/dev/ahsc.c,v
retrieving revision 1.1.1.1
diff -c -r1.1.1.1 ahsc.c
*** 1.1.1.1 1994/06/12 21:09:54
--- ahsc.c 1994/08/19 01:55:46
***************
*** 112,121 ****
volatile struct sdmac *rp;
struct sbic_softc *sc;
- printf("\n");
-
sc = (struct sbic_softc *)dp;
sc->sc_cregs = rp = ztwomap(0xdd0000);
/*
* disable ints and reset bank register
*/
--- 112,122 ----
volatile struct sdmac *rp;
struct sbic_softc *sc;
sc = (struct sbic_softc *)dp;
sc->sc_cregs = rp = ztwomap(0xdd0000);
+ printf (": sbic ctlr %d\n", sbic_cnt);
+ sc->sc_no = sbic_cnt++;
+
/*
* disable ints and reset bank register
*/
===================================================================
RCS file: /home2/CVSROOT/NetBSD/sys/arch/amiga/dev/atzsc.c,v
retrieving revision 1.1.1.4
diff -c -r1.1.1.4 atzsc.c
*** 1.1.1.4 1994/08/15 15:10:40
--- atzsc.c 1994/08/19 01:56:31
***************
*** 32,38 ****
* SUCH DAMAGE.
*
* @(#)dma.c
! * $Id: atzsc.c,v 1.1.1.4 1994/08/15 15:10:40 root Exp $
*/
#include <sys/param.h>
#include <sys/systm.h>
--- 32,38 ----
* SUCH DAMAGE.
*
* @(#)dma.c
! * $Id: atzsc.c,v 1.1.1.1.2.3 1994/08/15 20:13:32 root Exp $
*/
#include <sys/param.h>
#include <sys/systm.h>
***************
*** 123,128 ****
--- 123,131 ----
sc = (struct sbic_softc *)dp;
sc->sc_cregs = rp = zap->va;
+ printf (": sbic ctlr %d", sbic_cnt);
+ sc->sc_no = sbic_cnt++;
+
/*
* disable ints and reset bank register
*/
***************
*** 158,164 ****
sc->sc_sbicp = (sbic_regmap_p) ((int)rp + 0x91);
sc->sc_clkfreq = sbic_clock_override ? sbic_clock_override : 77;
! printf(": dmamask 0x%x\n", ~sc->sc_dmamask);
sbicreset(sc);
--- 161,167 ----
sc->sc_sbicp = (sbic_regmap_p) ((int)rp + 0x91);
sc->sc_clkfreq = sbic_clock_override ? sbic_clock_override : 77;
! printf(" dmamask 0x%x\n", ~sc->sc_dmamask);
sbicreset(sc);
===================================================================
RCS file: /home2/CVSROOT/NetBSD/sys/arch/amiga/dev/gtsc.c,v
retrieving revision 1.1.1.2
diff -c -r1.1.1.2 gtsc.c
*** 1.1.1.2 1994/06/18 10:50:37
--- gtsc.c 1994/08/19 01:55:19
***************
*** 32,38 ****
* SUCH DAMAGE.
*
* @(#)dma.c
! * $Id: gtsc.c,v 1.1.1.2 1994/06/18 10:50:37 root Exp $
*/
#include <sys/param.h>
#include <sys/systm.h>
--- 32,38 ----
* SUCH DAMAGE.
*
* @(#)dma.c
! * $Id: gtsc.c,v 1.1.1.1.2.1 1994/06/18 21:30:13 root Exp $
*/
#include <sys/param.h>
#include <sys/systm.h>
***************
*** 120,125 ****
--- 120,127 ----
gap = auxp;
sc = (struct sbic_softc *)dp;
sc->sc_cregs = rp = gap->zargs.va;
+ printf (": sbic ctlr %d", sbic_cnt);
+ sc->sc_no = sbic_cnt++;
/*
* disable ints and reset bank register
***************
*** 148,154 ****
sc->sc_dmamask = ~0x01ffffff;
else
sc->sc_dmamask = ~0x07ffffff;
! printf(": dmamask 0x%x", ~sc->sc_dmamask);
if ((gap->flags & GVP_NOBANK) == 0)
sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0;
--- 150,156 ----
sc->sc_dmamask = ~0x01ffffff;
else
sc->sc_dmamask = ~0x07ffffff;
! printf(" dmamask 0x%x", ~sc->sc_dmamask);
if ((gap->flags & GVP_NOBANK) == 0)
sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0;
===================================================================
RCS file: /home2/CVSROOT/NetBSD/sys/arch/amiga/dev/sbic.c,v
retrieving revision 1.1.1.3
diff -c -r1.1.1.3 sbic.c
*** 1.1.1.3 1994/06/22 00:02:52
--- sbic.c 1994/08/19 02:19:39
***************
*** 35,41 ****
* SUCH DAMAGE.
*
* @(#)scsi.c 7.5 (Berkeley) 5/4/91
! * $Id: sbic.c,v 1.1.1.3 1994/06/22 00:02:52 root Exp $
*/
/*
--- 35,41 ----
* SUCH DAMAGE.
*
* @(#)scsi.c 7.5 (Berkeley) 5/4/91
! * $Id: sbic.c,v 1.1.1.1.2.2 1994/06/22 10:08:26 root Exp $
*/
/*
***************
*** 45,50 ****
--- 45,59 ----
/* need to know if any tapes have been configured */
#include "st.h"
+ /*
+ * Count the number of controllers using this driver, we need to build
+ * a sync enable array large enough for all of them.
+ */
+ #include "ahsc.h"
+ #include "atzsc.h"
+ #include "gtsc.h"
+ #define NSBIC (NAHSC + NATZSC + NGTSC)
+
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
***************
*** 107,117 ****
int sbic_data_wait = SBIC_DATA_WAIT;
int sbic_init_wait = SBIC_INIT_WAIT;
/*
! * was broken before.. now if you want this you get it for all drives
! * on sbic controllers.
*/
! int sbic_inhibit_sync = 1;
int sbic_clock_override = 0;
int sbic_no_dma = 0;
--- 116,127 ----
int sbic_data_wait = SBIC_DATA_WAIT;
int sbic_init_wait = SBIC_INIT_WAIT;
+ int sbic_cnt = 0;
/*
! * Another try on individual sync setting. Trust uninitialized data
! * is zero on startup.
*/
! char sbic_enable_sync[NSBIC * 8] = { 0 };
int sbic_clock_override = 0;
int sbic_no_dma = 0;
***************
*** 593,599 ****
* handle drives that don't want to be asked
* whether to go sync at all.
*/
! if (sbic_inhibit_sync && dev->sc_sync[id].state == SYNC_START) {
#ifdef DEBUG
if (sync_debug)
printf("Forcing target %d asynchronous.\n", id);
--- 603,610 ----
* handle drives that don't want to be asked
* whether to go sync at all.
*/
! if (!sbic_enable_sync[id + dev->sc_no]
! && dev->sc_sync[id].state == SYNC_START) {
#ifdef DEBUG
if (sync_debug)
printf("Forcing target %d asynchronous.\n", id);
===================================================================
RCS file: /home2/CVSROOT/NetBSD/sys/arch/amiga/dev/sbicvar.h,v
retrieving revision 1.1.1.2
diff -c -r1.1.1.2 sbicvar.h
*** 1.1.1.2 1994/06/18 10:54:42
--- sbicvar.h 1994/08/19 01:00:57
***************
*** 34,40 ****
* SUCH DAMAGE.
*
* @(#)scsivar.h 7.1 (Berkeley) 5/8/90
! * $Id: sbicvar.h,v 1.1.1.2 1994/06/18 10:54:42 root Exp $
*/
#ifndef _SBICVAR_H_
#define _SBICVAR_H_
--- 34,40 ----
* SUCH DAMAGE.
*
* @(#)scsivar.h 7.1 (Berkeley) 5/8/90
! * $Id: sbicvar.h,v 1.1.1.1.2.1 1994/06/18 21:39:01 root Exp $
*/
#ifndef _SBICVAR_H_
#define _SBICVAR_H_
***************
*** 90,95 ****
--- 90,96 ----
void (*sc_dmafree) __P((struct sbic_softc *));
void (*sc_dmastop) __P((struct sbic_softc *));
u_short gtsc_bankmask; /* GVP specific bank selected */
+ int sc_no;
};
/* sc_flags */
***************
*** 110,116 ****
#define DDB_FOLLOW 0x04
#define DDB_IO 0x08
#endif
! extern int sbic_inhibit_sync;
extern int sbic_no_dma;
extern int sbic_clock_override;
--- 111,118 ----
#define DDB_FOLLOW 0x04
#define DDB_IO 0x08
#endif
! extern int sbic_cnt;
! extern char sbic_enable_sync[];
extern int sbic_no_dma;
extern int sbic_clock_override;
------------------------------------------------------------------------------