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[patch] Fixing radeondrm on the AMD RS690 chipset



Hi,

With this patch I can get working 3d acceleration on the AMD RS690 integrated
graphics (alias "Radeon Xpress 1250").

I tested this patch using the xf86-video-ati driver of the "native" Xorg on a
NetBSD-6.99.18 userland.

Works in NetBSD/amd64 running on an ASUS M2AVM-HDMI motherboard.

Also works on my HP 6715s notebook, after additionally replacing
pci_intr_establish with pci_msi_establish in
"sys/external/bsd/drm/dist/bsd-core/drm_irq.c".
Apparently on some machines this chipset only works with MSI interrupts.

At least on the RS690 and RS740 the GART table needs to be aligned to its size
(according to
"http://lists.freedesktop.org/archives/dri-devel/2010-July/002146.html";).
E.g. For a 512Mb GART the GTT page table is 512Kb large and hence should be
aligned to 512Kb. The offset into VRAM specified from userspace doesn't seem
to be properly aligned (probably need to look into the xf86-video-ati code for
this), so I'm ignoring it and instead always allocate the GTT page table from
DMA memory (instead of VRAM) on RS690 or RS740 chipsets.


--- sys/external/bsd/drm/dist/bsd-core/ati_pcigart.c.orig
+++ sys/external/bsd/drm/dist/bsd-core/ati_pcigart.c
@@ -113,7 +113,7 @@ drm_ati_alloc_pcigart_table(struct drm_device *dev,
        if (gart_info->gart_reg_if == DRM_ATI_GART_IGP)
                flags |= BUS_DMA_NOCACHE;
 
-       ret = bus_dmamem_alloc(dmah->tag, gart_info->table_size, PAGE_SIZE,
+       ret = bus_dmamem_alloc(dmah->tag, gart_info->table_size, 
gart_info->table_size,
        0, dmah->segs, 1, &nsegs, flags);
        if (ret != 0) {
                printf("drm: unable to allocate %zu bytes of DMA, error %d\n",
--- sys/external/bsd/drm/dist/shared-core/radeon_cp.c.orig
+++ sys/external/bsd/drm/dist/shared-core/radeon_cp.c
@@ -1283,7 +1283,9 @@ static int radeon_do_init_cp(struct drm_device * dev, 
drm_radeon_init_t * init)
        {
                dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
                /* if we have an offset set from userspace */
-               if (dev_priv->pcigart_offset_set) {
+               if ((dev_priv->flags & RADEON_FAMILY_MASK) != CHIP_RS690 &&
+                   (dev_priv->flags & RADEON_FAMILY_MASK) != CHIP_RS740 &&
+                   dev_priv->pcigart_offset_set) {
                        dev_priv->gart_info.bus_addr =
                            dev_priv->pcigart_offset + dev_priv->fb_location;
                        dev_priv->gart_info.mapping.offset =


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