Subject: Re: bus_dma(9) - q WRT bus_dmamap_load()
To: Matt Thomas <matt@3am-software.com>
From: Jaromír <jdolecek@netbsd.org>
List: tech-kern
Date: 04/13/2001 21:16:20
Matt Thomas wrote:
> >This sometimes works, but sometimes the bus_dmamap_load() doesn't
> >find suitable segment. If I try to raise nsegments for bus_dmamap_create(),
> >bus_dmamap_load() then returns two segments, split like
> >94 bytes and 418 bytes. Of course, this is not particularily useful
> >for me, since the MCA DMA controller can accept only one dma
> >address.
> 
> So you transfer the first one, and then return.  when the dma completes
> and you get an interrupt, you xfer the 2nd segment, and then when you
> get the interrupt for the final segment you can then signal you are
> done with the buffer.

Like setup the DMA controller for the first 94 bytes, kick the device
to do transfer, and once that transfer is finished, repeat for the
second segment?
Unfortunately, the device doesn't seem to support this. It really
wants to transfer whole block (512 bytes) at once in one operation -
if I try to arrange for 94 byte DMA transfer, it returns DMA Error
condition.
So am I doomed to use a bounce buffer in case memory in bp->b_data
is not contiguous in this case? 

Jaromir
-- 
Jaromir Dolecek <jdolecek@NetBSD.org>      http://www.ics.muni.cz/~dolecek/
NetBSD - just plain best OS! -=<>=- Got spare MCA cards or docs? Hand me them!