On Tue, 8 Jun 1999, Toru Nishimura wrote:

> According to simonb's report of May 29, DS5000/260 is boggled down as; 
> 
>         boot device: rz2
>         root on rz2a dumps on rz2b
>         root file system type: ffs
>         trap: TLB miss (load or instr. fetch) in kernel mode
>         status=0x7c02, cause=0x808, epc=0x80032990, vaddr=0x3ff000
>         pid=1 cmd=init usp=0x7ffffdf8 ksp=0xc5ad9d30
>         Stopped in init at      0x80032990:     cache   zero,a0,0
> 
> Assuming the 'vaddr' shows a correct value, it's a very weird result
> because statically linked '/sbin/init' has no text address range of
> 0x3ff000 (around 4MB).  If mips3_FlushICache() really tries to flush
> processor's I-cache searching 0x3ff000, it's an expected behaviour for
> kernel to post an exception.  Hint, hint?

  Someone needs to get the value of $RA to find out where the cache flush
is being called from.  That would help determine what the kernel is really
trying to flush.

  Actually, it looks to me like an error in pmap.c from removing the
mipspagesperpage.  The virtual address was bumped by NBPG in the loop, and
the cache flush was being done after the loop and adjusts for NBPG.  That
cache flush should not be subtracting NBPG from va anymore.  This is about
line 1329 in pmap.c.  I've just committed the fix for this.

Michael