Manuel Bouyer writes:
> On Sat, Mar 17, 2001 at 02:28:30PM -0800, Wolfgang Rupprecht wrote:
> > Is there something the Atapi driver could do to reset the bus and
> > restart the I/O?  (NB: this problem does seem to get better when
> The drivers tries to do that. But the message "piomode timed out" let me
> believe that the soft reset didn't complete ... And on most IDE controller
> a hard reset can't be triggered by software.

I just got some private mail from Todd Kover that got me wondering
where the data was being corrupted.  I had assumed it was on the IDE
cable, but for all I know it could be a problem from the via->memory
that only occurs when the IDE is the master.

Are any of the bus timings for VIA chip documented?  Can the
chip-dependent part of the driver setup crank up the front and back
porch delays around IDE transfers?  Eg could it add extra setup and
settling time?

-wolfgang
-- 
Wolfgang Rupprecht    <wolfgang@wsrcc.com>     http://www.wsrcc.com/wolfgang/
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