Subject: Re: spdmem works for a nForce 3 chipset
To: None <current-users@NetBSD.org>
From: Tobias Nygren <tnn@NetBSD.org>
List: current-users
Date: 08/18/2007 17:05:25
On Sat, 18 Aug 2007 16:53:35 +0200
Bernd Ernesti <netbsd@lists.veego.de> wrote:

> On Sat, Aug 18, 2007 at 11:35:56AM +0000, Tobias Nygren wrote:
> > 
> > Module Name:	src
> > Committed By:	tnn
> > Date:		Sat Aug 18 11:35:56 UTC 2007
> > 
> > Modified Files:
> > 	src/sys/arch/amd64/conf: GENERIC
> > 	src/sys/arch/i386/conf: ALL GENERIC
> > 
> > Log Message:
> > Enable spdmem(4) in ALL configuration. Add commented out entries to GENERIC
> 
> Cool and it works with a nfsmbc:
> 
> nfsmbc0 at pci0 dev 1 function 1: NVIDIA nForce3 250 SMBus Controller (rev. 0xa1)
> nfsmb0 at nfsmbc0 SMBus 1
> iic0 at nfsmb0: I2C bus
> spdmem0 at iic0 addr 0x52
> spdmem0: DDR SDRAM memory, no parity or ECC, 1024MB, 400MHz, PC3200
> spdmem0: 13 rows, 11 cols, 2 ranks, 4 banks/chip, 5.0ns cycle time
> spdmem0: voltage SSTL 2.5V, refresh time 7.8us (self-refreshing)
> spdmem1 at iic0 addr 0x53
> spdmem1: DDR SDRAM memory, no parity or ECC, 1024MB, 400MHz, PC3200
> spdmem1: 13 rows, 11 cols, 2 ranks, 4 banks/chip, 5.0ns cycle time
> spdmem1: voltage SSTL 2.5V, refresh time 7.8us (self-refreshing)
> 
> Would it be possible to not use fixed addresses and enable spdmem
> by default?
> I thought that there was some code to scan an iic, but maybe that
> was just the spdmem code to get the spd informations.

Automated i2c scanning needs to use heuristics to determine what
device is really there, and can have nasty side-effects if the i2c bus
has devices whose state is affected by probing them. I don't know if
there are any such devices on SMbus, though. I wouldn't mind having
such a facility but it would need to be very carefully designed.

-Tobias